9b80a8d4bc
This is generic PCI stuff, not nothbridge-specific in any way. The respective #defines are already present in src/include/device/pci_def.h. Abuild-tested, so shouldn't break anything. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
39 lines
883 B
C
39 lines
883 B
C
#define IURBASE 0X14
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#define MCHCFG0 0X50
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#define MCHSCRB 0X52
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#define FDHC 0X58
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#define PAM 0X59
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#define DRB 0X60
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#define DRA 0X70
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#define DRT 0X78
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#define DRC 0X7C
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#define DRM 0X80
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#define DRORC 0X82
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#define ECCDIAG 0X84
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#define SDRC 0X88
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#define CKDIS 0X8C
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#define CKEDIS 0X8D
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#define DDRCSR 0X9A
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#define DEVPRES 0X9C
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#define DEVPRES_D0F0 (1 << 0)
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#define DEVPRES_D1F0 (1 << 1)
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#define DEVPRES_D2F0 (1 << 2)
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#define DEVPRES_D3F0 (1 << 3)
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#define DEVPRES_D4F0 (1 << 4)
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#define DEVPRES_D5F0 (1 << 5)
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#define DEVPRES_D6F0 (1 << 6)
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#define DEVPRES_D7F0 (1 << 7)
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#define ESMRC 0X9D
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#define SMRC 0X9E
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#define EXSMRC 0X9F
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#define DDR2ODTC 0XB0
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#define TOLM 0XC4
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#define REMAPBASE 0XC6
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#define REMAPLIMIT 0XC8
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#define REMAPOFFSET 0XCA
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#define TOM 0XCC
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#define EXPECBASE 0XCE
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#define DEVPRES1 0XF4
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#define DEVPRES1_D0F1 (1 << 5)
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#define DEVPRES1_D8F0 (1 << 1)
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#define MSCFG 0XF6
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