coreboot-kgpe-d16/payloads/libpayload/arch
Ionela Voinescu 3673311619 libpayload: mips: add SOC CPU frequency
Add CPU frequency corresponding to SOC.

BUG=chrome-os-partner:31438
TEST=tested on Pistachio bring up board; behaves as expected.
BRANCH=none

Change-Id: I05458070a15c6cf1ef0fc2104715a63902a38887
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4afe332bcc41afeb7e31e918e345c3336f7dc604
Original-Change-Id: I55b788faf7984bafc2509cac69867a772c7cb863
Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/241427
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/8853
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-21 11:09:22 +01:00
..
arm libpayload: Consolidate coreboot table parsing 2015-03-20 15:31:59 +01:00
arm64 libpayload arm64: Add function to get coreboot table ptr 2015-03-21 10:34:33 +01:00
mips libpayload: mips: add SOC CPU frequency 2015-03-21 11:09:22 +01:00
x86 libpayload: move MRC processing to x86 path and remove ACPI_GNVS duplication 2015-03-20 15:33:47 +01:00
Config.in libpayload: arch/mips: Add basic MIPS architecture support 2015-03-21 11:07:50 +01:00