41359bd230
Enable pinmux clamp function to avoid pinmux conflict. For pins which are configured to tristate enabled, the inputs to the controller will be clamped to zero. This can be used to avoid pinmux conflicts since the tristate bit is set to 1 in the power-on-reset pinmux setting. With pinmux clamp enabled, we need to configure all the input pins to tristate disabled. BUG=chrome-os-partner:27091 BRANCH=None TEST=built and booted successfully, display worked fine. Original-Change-Id: Id79a717f2025c812908c7152d439351208aee8d2 Original-Signed-off-by: Ken Chang <kenc@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/194060 Original-Reviewed-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit c95d6fe79810612cfad721667657cdcb87068d23) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I1b23df8b90f83ea2b2c08c4364d90fe71533a5a0 Reviewed-on: http://review.coreboot.org/7775 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
35 lines
1 KiB
C
35 lines
1 KiB
C
/*
|
|
* This file is part of the coreboot project.
|
|
*
|
|
* Copyright 2014 Google Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; version 2 of the License.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
*/
|
|
|
|
#include <arch/io.h>
|
|
#include <soc/addressmap.h>
|
|
|
|
#include "apbmisc.h"
|
|
|
|
static struct apbmisc *misc = (struct apbmisc *)TEGRA_APB_MISC_BASE;
|
|
|
|
void enable_jtag(void)
|
|
{
|
|
write32(PP_CONFIG_CTL_JTAG, &misc->pp_config_ctl);
|
|
}
|
|
|
|
void clamp_tristate_inputs(void)
|
|
{
|
|
write32(PP_PINMUX_CLAMP_INPUTS, &misc->pp_pinmux_global);
|
|
}
|