coreboot-kgpe-d16/src/cpu/x86/pae
Aaron Durbin 696c642afa cpu/x86: add limited runtime identity page mapping
When employing PAGING_IN_CACHE_AS_RAM more areas need to be
mapped in at runtime. Therefore, paging_identity_map_addr() is
added to support adding identity mappings. Because there are a
fixed amount of pages in cache-as-ram paging only the existing
paging structures can be used. As such that's a limitation on
what regions and length one can map. Using util/x86/x86_page_tables.go
to generate page tables will always populate all the page directory
pages. Therefore, 2MiB mappings are easy to map in.

BUG=b:72728953

Change-Id: Ibe33aa12972ff678d2e9b80874529380b4ce9fd7
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25718
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-26 06:55:59 +00:00
..
Makefile.inc cpu/x86: add pae paging module to all stages 2018-04-23 09:17:34 +00:00
pgtbl.c cpu/x86: add limited runtime identity page mapping 2018-04-26 06:55:59 +00:00