coreboot-kgpe-d16/util/nvramtool
Patrick Georgi 3909908de8 util: Allow overriding gcc as default host compiler
BUG=chromium:1088209
TEST=emerge coreboot-utils (with patches to the ebuild) works

Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Change-Id: I25d237d048e417f4e412583031905ecf3614c431
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42016
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2020-06-04 08:11:48 +00:00
..
accessors util: Use SPDX headers 2020-05-11 19:38:40 +00:00
cli util: Use SPDX headers 2020-05-11 19:38:40 +00:00
COPYING
ChangeLog
DISCLAIMER
Makefile util: Allow overriding gcc as default host compiler 2020-06-04 08:11:48 +00:00
Makefile.inc
README Use more secure HTTPS URLs for coreboot sites 2017-06-07 12:04:50 +02:00
cbfs.c
cbfs.h
cmos_lowlevel.c
cmos_lowlevel.h
cmos_ops.c
cmos_ops.h
common.c
common.h
compute_ip_checksum.c
coreboot_tables.h
description.md util: Add description.md to each util 2018-07-26 13:26:50 +00:00
hexdump.c util: Use SPDX headers 2020-05-11 19:38:40 +00:00
hexdump.h
input_file.c util: Use SPDX headers 2020-05-11 19:38:40 +00:00
input_file.h util: Use SPDX headers 2020-05-11 19:38:40 +00:00
ip_checksum.h Use more secure HTTPS URLs for coreboot sites 2017-06-07 12:04:50 +02:00
layout.c
layout.h util: Use SPDX headers 2020-05-11 19:38:40 +00:00
lbtable.c
lbtable.h
nvramtool.spec
reg_expr.c
reg_expr.h
win32mmap.c

README

Summary of Operation
--------------------
nvramtool is a utility for reading/writing coreboot parameters and
displaying information from the coreboot table.  It is intended for x86-based
systems (both 32-bit and 64-bit) that use coreboot.

The coreboot table resides in low physical memory, and may be accessed
through the /dev/mem interface.  It is created at boot time by coreboot, and
contains various system information such as the type of mainboard in use.  It
specifies locations in the CMOS (nonvolatile RAM) where the coreboot
parameters are stored.

For information about coreboot, see https://www.coreboot.org/.

Ideas for Future Improvements
-----------------------------
1.  Move the core functionality of this program into a shared library.
2.  Consider adding options for displaying other BIOS-provided information
    such as the MP table, ACPI table, PCI IRQ routing table, etc.