Pratik Prajapati 39648bb54b mainboard/intel/cannonlake_rvp: SMBus, SAGV and Skip FSP MPInit in devicetree ... Set SMBus, SAGV and Skip FSP MPInit configuration from devicetree.cb Change-Id: Ic810b003bf7fb13447d5d5dcd49cfcc31785b440 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21198 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2017-08-25 18:24:47 +00:00
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spd	intel/cannonlake_rvp: Split RVP boards and SPD	2017-07-26 21:37:14 +00:00
variants	mainboard/intel/cannonlake_rvp: SMBus, SAGV and Skip FSP MPInit in devicetree	2017-08-25 18:24:47 +00:00
board_info.txt
bootblock.c	src/mainboard/intel/cannonlake: Add gpio support for cannonlake	2017-08-23 15:53:10 +00:00
chromeos.c	src/mainboard/intel/cannonlake: Add gpio support for cannonlake	2017-08-23 15:53:10 +00:00
Kconfig	mainboard/intel/cannonlake_rvp: set Max CPUs and Mainboard Family	2017-08-24 16:23:29 +00:00
Kconfig.name	intel/cannonlake_rvp: Split RVP boards and SPD	2017-07-26 21:37:14 +00:00
Makefile.inc	src/mainboard/intel/cannonlake: Add gpio support for cannonlake	2017-08-23 15:53:10 +00:00
romstage.c	intel/cannonlake_rvp: Split RVP boards and SPD	2017-07-26 21:37:14 +00:00