Peter Stuge deabf510bf Changes by Richard Smith and Peter Stuge from the LinuxBIOS symposium 2006. ... With CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0, 1 million outb():s are used for timer calibration, which takes about one second. All EPIA-M boards have timer2 so we use it to boot faster. Only some EPIA boards have the Nehemiah CPU with timer2 so we default to IO calibration but add the TSC options so that they can be set in Config.lb. src/mainboard/via/epia*/reset.c is dead code (entire file within #if 0) so we set HAVE_HARD_RESET=0 for both boards. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2659 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2007-05-10 23:50:27 +00:00
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epia	Changes by Richard Smith and Peter Stuge from the LinuxBIOS symposium 2006.	2007-05-10 23:50:27 +00:00
epia-m	Use __PAYLOAD__ instead of PAYLOAD as replacement template for abuild.	2007-04-22 19:03:34 +00:00