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Martin Roth 3aef7b4f63 Fix SPI BAR special case in lpc_set_resources
There was already a special case for the SPI base address in
lpc_set_resources for southbridge/amd/cimx/sb800 and
southbridge/amd/agesa/hudson, but it needed to be modified
to keep from killing the IMC rom during initialization.  As
soon as the BAR is disabled by setting the new base address,
the IMC dies.  The fix is to make sure it's still enabled
when setting the new base address instead of setting the new
address then re-enabling it.

Change the name SPIROM_BASE_ADDRESS to SPIROM_BASE_ADDRESS_REGISTER
to more accurately describe what we're using.

Change-Id: I216d75b722c4332c239d487111a9880eabf59e91
Signed-off-by: Martin Roth <martin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1975
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-12-12 22:34:32 +01:00
3rdparty@7eb78b1109 Update 3rdparty to it's HEAD 2012-12-12 06:02:46 +01:00
documentation Add multi-architecture support to cbfstool 2012-11-30 00:42:31 +01:00
payloads libpayload: Fix use of virtual pointers in sysinfo 2012-12-10 16:45:24 +01:00
src Fix SPI BAR special case in lpc_set_resources 2012-12-12 22:34:32 +01:00
util cbfstool: Catch failing parse_elf_to_payload() 2012-12-12 06:05:39 +01:00
.gitignore Utility to dump boot timing table 2012-11-12 03:35:20 +01:00
.gitmodules
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING
Makefile Makefile cosmetics 2012-12-08 03:08:45 +01:00
Makefile.inc Rename devices -> device 2012-11-30 23:59:58 +01:00
README

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.