Felix Held 3bdbdb77a2 soc/amd/common/block/i2c/i23c_pad_ctr: add & use I23C pad configuration ... I2C bus 0..2 on Sabrina uses a different pad type which supports 1.1V and 1.8V levels, but doesn't support 3.3V I2C levels. Compared to the existing I2C pad control registers the bit definitions are different, so add a separate function to configure those pads which however still has the same function signature and is compatible with same data structs used for the devicetree settings. PPR #57243 Rev 1.50 was used as a reference. TEST=None Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ie210c3437f2608d1e9fb99dcb151fc4190721375 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61570 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2022-02-04 14:02:27 +00:00
..
cezanne	soc/amd/*/i2c: factor out common I2C pad configuration	2022-02-03 23:46:00 +00:00
common	soc/amd/common/block/i2c/i23c_pad_ctr: add & use I23C pad configuration	2022-02-04 14:02:27 +00:00
picasso	soc/amd/*/i2c: factor out common I2C pad configuration	2022-02-03 23:46:00 +00:00
sabrina	soc/amd/common/block/i2c/i23c_pad_ctr: add & use I23C pad configuration	2022-02-04 14:02:27 +00:00
stoneyridge	soc/amd/*/chip.h: add missing gpio.h include	2022-01-13 18:08:14 +00:00
Kconfig	soc/amd: rename common Kconfig and use wildcard for SoC-specific Kconfig	2020-11-19 14:29:14 +00:00