6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
38 lines
926 B
C
38 lines
926 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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// Use simple device model for this file even in ramstage
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#define __SIMPLE_DEVICE__
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#include <stdint.h>
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#include <device/pci_ops.h>
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#include <device/pci_ehci.h>
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#include <device/pci_def.h>
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pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
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{
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u32 class;
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pci_devfn_t dev;
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if (!CONFIG(HAVE_USBDEBUG_OPTIONS))
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return PCI_DEV(0, 0x1d, 7);
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if (hcd_idx == 2)
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dev = PCI_DEV(0, 0x1a, 0);
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else
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dev = PCI_DEV(0, 0x1d, 0);
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/* If we enter here before RCBA programming, EHCI function may
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* appear with the highest function number instead.
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*/
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class = pci_read_config32(dev, PCI_CLASS_REVISION) >> 8;
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if (class != PCI_EHCI_CLASSCODE)
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dev |= PCI_DEV(0, 0, 7);
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return dev;
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}
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/* Required for successful build, but currently empty. */
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void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
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{
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/* Not needed, the ICH* southbridges hardcode physical USB port 1. */
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}
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