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Shreesh Chhabbi 3c6ad8d184 mb/google/volteer: Enable external bypass, clkgate & phygate 
This change sets the soc config options for external_bypass,
external_clk_gate and external_phy_gate.

BUG=b:177821896
TEST=Build coreboot for volteer

Signed-off-by: Shreesh Chhabbi <shreesh.chhabbi@intel.corp-partner.google.com>
Change-Id: I9e5218cda79d7453bf830639ccea4e5be019b070
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50290
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 		2021-02-10 07:23:22 +00:00
..
acpi acpi: Add support for reporting CrashLog in BERT table 2021-02-04 10:21:02 +00:00
arch acpi: Fix Coverity Scan report 2021-02-10 07:22:35 +00:00
commonlib acpi: Add support for reporting CrashLog in BERT table 2021-02-04 10:21:02 +00:00
console lib/trace: Remove TRACE support 2020-12-02 23:35:58 +00:00
cpu mb/emulation/qemu: Fix SMP boot 2021-02-04 09:53:02 +00:00
device device/azalia_device: Add mainboard hook to program codecs 2021-02-10 07:21:11 +00:00
drivers src: Remove unused <boot_device.h> 2021-02-10 07:22:08 +00:00
ec src/ec/acpi/ec.asl: Convert to ASL 2.0 2021-02-09 07:46:40 +00:00
include device/azalia_device: Add mainboard hook to program codecs 2021-02-10 07:21:11 +00:00
lib drivers/intel/fsp1_1,fsp2_0: Refactor logo display 2021-02-09 07:52:31 +00:00
mainboard mb/google/volteer: Enable external bypass, clkgate & phygate 2021-02-10 07:23:22 +00:00
northbridge nb/intel/x4x: Correct DDR3 turnaround table 2021-02-10 07:20:38 +00:00
security security/vboot/bootmode: Add weak fill_lb_gpios 2021-02-09 20:43:12 +00:00
soc soc/intel/tgl: Update S0ix enable mask based on SoC and mainboard design 2021-02-10 07:23:09 +00:00
southbridge sb/amd/common/acpi: Convert 'sleepstates.asl' to ASL 2.0 syntax 2021-02-10 00:21:59 +00:00
superio superio/nuvoton/common/Kconfig: Remove HWM config 2021-01-29 09:39:43 +00:00
vendorcode vc/amd/fsp/cezanne: add FspGuids.h 2021-02-09 19:13:29 +00:00
Kconfig nb/intel/gm45: Factor out {DMI,EP,MCH}BAR accessors 2021-02-07 20:20:00 +00:00