3ca35cae35
This introduces a dummy queue head in the interrupt frame list of the EHCI host controller. It's a workaround for broken controllers which follow pointers from this list even if the terminate bit is set. Fortunately, they do honor the bit in queue heads and having an empty QH in the list doesn't violate the standard. The linux kernel has a similar workaround for AMD SB700, SB800, and Hudson-2/3 platforms. We observed this bug with an AMD SB600. Change-Id: Ibbb66dea5fddc89c7995a24d746bedf6bfa887be Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1124 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) |
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