coreboot-kgpe-d16/src/northbridge/intel
Angel Pons 3d35756d5a nb/intel/ironlake: Correct even more replay issues
The per-lane registers need to be modified in some cases. Also, MRC
does not have any delay after the loop, so remove it.

Tested on out-of-tree HP 630, still boots.

Change-Id: If02e171d2e999f4a5be5b43ecc5aafe8ca092951
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49585
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-24 11:42:29 +00:00
..
common nb/intel/common/fixed_bars.h: Add casts to uintptr_t 2021-02-12 07:52:37 +00:00
e7505 src: use ARRAY_SIZE where possible 2021-02-15 11:30:40 +00:00
gm45 nb/intel: Add missing <types.h> 2021-02-16 20:56:56 +00:00
haswell nb/intel/haswell/pcie.c: remove disable NOP 2021-02-24 11:28:06 +00:00
i440bx cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
i945 device/device.c: Rename .disable to .vga_disable 2021-02-24 11:28:16 +00:00
ironlake nb/intel/ironlake: Correct even more replay issues 2021-02-24 11:42:29 +00:00
pineview nb/intel/pineview: Drop unused GPIO32 macro 2021-02-18 10:14:56 +00:00
sandybridge device/device.c: Rename .disable to .vga_disable 2021-02-24 11:28:16 +00:00
x4x device/device.c: Rename .disable to .vga_disable 2021-02-24 11:28:16 +00:00