Philipp Hug 3d398ad37a soc/sifive/fu540: Initialize PLL and clock ... Change-Id: Iba0669e08940e373aaf42cbba3a1ceffd68a4f52 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/27439 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>		2018-09-12 12:31:28 +00:00
..
include/soc	soc/sifive/fu540: Initialize PLL and clock	2018-09-12 12:31:28 +00:00
bootblock.c
cbmem.c
clint.c	soc/sifive/fu540: add CLINT support	2018-09-10 15:03:37 +00:00
clock.c	soc/sifive/fu540: Initialize PLL and clock	2018-09-12 12:31:28 +00:00
Kconfig
Makefile.inc	soc/sifive/fu540: Makefile: include mtime_init in ramstage	2018-09-10 20:36:45 +00:00
media.c
otp.c	soc/sifive: fix compiler warning	2018-09-10 20:37:17 +00:00
sdram.c	sifive/fu540: add empty sdram init and size functions	2018-07-18 07:54:54 +00:00
uart.c