3e4e303858
coreboot tables are, unlike general system tables, a platform independent concept. Hence, use the same code for coreboot table generation on all platforms. lib/coreboot_tables.c is based on the x86 version of the file, because some important fixes were missed on the ARMv7 version lately. Change-Id: Icc38baf609f10536a320d21ac64408bef44bb77d Signed-off-by: Stefan Reinauer <reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/2863 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
506 lines
13 KiB
C
506 lines
13 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2011-2012 The ChromiumOS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <types.h>
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#include <string.h>
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#include <device/device.h>
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#include <device/pci_def.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL
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#include <x86emu/x86emu.h>
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#endif
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#include <pc80/mc146818rtc.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/interrupt.h>
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#include <boot/coreboot_tables.h>
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#include "hda_verb.h"
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#include "onboard.h"
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#include "ec.h"
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <smbios.h>
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#include <device/pci.h>
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#include <ec/quanta/ene_kb3940q/ec.h>
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#include <vendorcode/google/chromeos/fmap.h>
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static unsigned int search(char *p, char *a, unsigned int lengthp,
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unsigned int lengtha)
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{
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int i, j;
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/* Searching */
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for (j = 0; j <= lengtha - lengthp; j++) {
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for (i = 0; i < lengthp && p[i] == a[i + j]; i++) ;
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if (i >= lengthp)
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return j;
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}
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return lengtha;
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}
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static unsigned char get_hex_digit(char *offset)
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{
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unsigned char retval = 0;
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retval = *offset - '0';
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if (retval > 0x09) {
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retval = *offset - 'A' + 0x0A;
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if (retval > 0x0F)
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retval = *offset - 'a' + 0x0a;
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}
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if (retval > 0x0F) {
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printk(BIOS_DEBUG, "Error: Invalid Hex digit found: %c - 0x%02x\n",
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*offset, (unsigned char)*offset);
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retval = 0;
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}
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return retval;
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}
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static int get_mac_address(u32 *high_dword, u32 *low_dword,
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u32 search_address, u32 search_length)
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{
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char key[] = "ethernet_mac";
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unsigned int offset;
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int i;
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offset = search(key, (char *)search_address,
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sizeof(key) - 1, search_length);
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if (offset == search_length) {
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printk(BIOS_DEBUG,
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"Error: Could not locate '%s' in VPD\n", key);
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return 0;
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}
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printk(BIOS_DEBUG, "Located '%s' in VPD\n", key);
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offset += sizeof(key); /* move to next character */
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*high_dword = 0;
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/* Fetch the MAC address and put the octets in the correct order to
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* be programmed.
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*
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* From RTL8105E_Series_EEPROM-Less_App_Note_1.1
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* If the MAC address is 001122334455h:
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* Write 33221100h to I/O register offset 0x00 via double word access
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* Write 00005544h to I/O register offset 0x04 via double word access
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*/
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for (i = 0; i < 4; i++) {
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*high_dword |= (get_hex_digit((char *)(search_address + offset))
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<< (4 + (i * 8)));
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*high_dword |= (get_hex_digit((char *)(search_address + offset + 1))
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<< (i * 8));
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offset += 3;
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}
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*low_dword = 0;
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for (i = 0; i < 2; i++) {
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*low_dword |= (get_hex_digit((char *)(search_address + offset))
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<< (4 + (i * 8)));
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*low_dword |= (get_hex_digit((char *)(search_address + offset + 1))
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<< (i * 8));
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offset += 3;
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}
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return *high_dword | *low_dword;
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}
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static void program_mac_address(u16 io_base, u32 search_address,
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u32 search_length)
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{
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/* Default MAC Address of A0:00:BA:D0:0B:AD */
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u32 high_dword = 0xD0BA00A0; /* high dword of mac address */
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u32 low_dword = 0x0000AD0B; /* low word of mac address as a dword */
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if (search_length != -1)
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get_mac_address(&high_dword, &low_dword, search_address,
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search_length);
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if (io_base) {
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printk(BIOS_DEBUG, "Realtek NIC io_base = 0x%04x\n", io_base);
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printk(BIOS_DEBUG, "Programming MAC Address\n");
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outb(0xc0, io_base + 0x50); /* Disable register protection */
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outl(high_dword, io_base);
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outl(low_dword, io_base + 0x04);
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outb(0x60, io_base + 54);
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outb(0x00, io_base + 0x50); /* Enable register protection again */
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}
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}
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static void program_keyboard_type(u32 search_address, u32 search_length)
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{
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char key[] = "keyboard_layout";
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char kbd_jpn[] = "xkb:jp::jpn";
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unsigned int offset;
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char kbd_type = EC_KBD_EN; /* Default keyboard type is English */
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if (search_length != -1) {
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/*
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* Search for keyboard_layout identifier
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* The only options in the EC are Japanese or English.
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* The English keyboard layout is actually used for multiple
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* different languages - English, Spanish, French... Because
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* of this the code only searches for Japanese, and sets the
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* keyboard type to English if Japanese is not found.
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*/
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offset = search(key, (char *)search_address, sizeof(key) - 1,
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search_length);
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if (offset != search_length) {
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printk(BIOS_DEBUG, "Located '%s' in VPD\n", key);
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offset += sizeof(key); /* move to next character */
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search_length = sizeof(kbd_jpn);
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offset = search(kbd_jpn, (char *)(search_address + offset),
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sizeof(kbd_jpn) - 1, search_length);
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if (offset != search_length)
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kbd_type = EC_KBD_JP;
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}
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} else
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printk(BIOS_DEBUG, "Error: Could not locate VPD area\n");
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printk(BIOS_DEBUG, "Setting Keyboard type in EC to ");
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printk(BIOS_DEBUG, (kbd_type == EC_KBD_JP) ? "Japanese" : "English");
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printk(BIOS_DEBUG, ".\n");
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ec_mem_write(EC_KBID_REG, kbd_type);
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}
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void mainboard_suspend_resume(void)
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{
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/* Call SMM finalize() handlers before resume */
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outb(0xcb, 0xb2);
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}
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#if defined(CONFIG_PCI_OPTION_ROM_RUN_REALMODE) && CONFIG_PCI_OPTION_ROM_RUN_REALMODE
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static int int15_handler(struct eregs *regs)
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{
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int res = -1;
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printk(BIOS_DEBUG, "%s: INT15 function %04x!\n",
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__func__, regs->eax & 0xffff);
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switch (regs->eax & 0xffff) {
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case 0x5f34:
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/*
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* Set Panel Fitting Hook:
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* bit 2 = Graphics Stretching
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* bit 1 = Text Stretching
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* bit 0 = Centering (do not set with bit1 or bit2)
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* 0 = video bios default
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*/
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regs->eax &= 0xffff0000;
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regs->eax |= 0x005f;
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regs->ecx &= 0xffffff00;
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regs->ecx |= 0x00; /* Use video bios default */
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res = 0;
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break;
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case 0x5f35:
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/*
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* Boot Display Device Hook:
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* bit 0 = CRT
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* bit 1 = TV (eDP)
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* bit 2 = EFP
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* bit 3 = LFP
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* bit 4 = CRT2
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* bit 5 = TV2 (eDP)
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* bit 6 = EFP2
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* bit 7 = LFP2
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*/
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regs->eax &= 0xffff0000;
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regs->eax |= 0x005f;
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regs->ecx &= 0xffff0000;
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regs->ecx |= 0x0000; /* Use video bios default */
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res = 0;
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break;
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case 0x5f51:
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/*
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* Hook to select active LFP configuration:
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* 00h = No LVDS, VBIOS does not enable LVDS
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* 01h = Int-LVDS, LFP driven by integrated LVDS decoder
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* 02h = SVDO-LVDS, LFP driven by SVDO decoder
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* 03h = eDP, LFP Driven by Int-DisplayPort encoder
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*/
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regs->eax &= 0xffff0000;
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regs->eax |= 0x005f;
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regs->ecx &= 0xffff0000;
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regs->ecx |= 0x0001; /* Int-LVDS */
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res = 0;
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break;
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case 0x5f70:
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switch ((regs->ecx >> 8) & 0xff) {
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case 0:
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/* Get Mux */
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regs->eax &= 0xffff0000;
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regs->eax |= 0x005f;
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regs->ecx &= 0xffff0000;
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regs->ecx |= 0x0000;
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res = 0;
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break;
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case 1:
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/* Set Mux */
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regs->eax &= 0xffff0000;
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regs->eax |= 0x005f;
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regs->ecx &= 0xffff0000;
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regs->ecx |= 0x0000;
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res = 0;
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break;
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case 2:
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/* Get SG/Non-SG mode */
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regs->eax &= 0xffff0000;
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regs->eax |= 0x005f;
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regs->ecx &= 0xffff0000;
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regs->ecx |= 0x0000;
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res = 0;
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break;
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default:
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/* Interrupt was not handled */
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printk(BIOS_DEBUG, "Unknown INT15 5f70 function: 0x%02x\n",
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((regs->ecx >> 8) & 0xff));
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return 0;
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}
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break;
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default:
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printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
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regs->eax & 0xffff);
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break;
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}
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return res;
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}
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#endif
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#if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL
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static int int15_handler(void)
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{
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printk(BIOS_DEBUG, "%s: AX=%04x BX=%04x CX=%04x DX=%04x\n",
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__func__, M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX);
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switch (M.x86.R_AX) {
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case 0x5f34:
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/*
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* Set Panel Fitting Hook:
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* bit 2 = Graphics Stretching
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* bit 1 = Text Stretching
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* bit 0 = Centering (do not set with bit1 or bit2)
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*/
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M.x86.R_AX = 0x005f;
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M.x86.R_CX = 0x00;
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break;
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case 0x5f35:
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/*
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* Boot Display Device Hook:
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* bit 0 = CRT
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* bit 1 = TV (eDP)
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* bit 2 = EFP
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* bit 3 = LFP
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* bit 4 = CRT2
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* bit 5 = TV2 (eDP)
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* bit 6 = EFP2
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* bit 7 = LFP2
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*/
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M.x86.R_AX = 0x005f;
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M.x86.R_CX = 0x0000; /* Use video bios default */
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break;
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case 0x5f51:
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/*
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* Hook to select active LFP configuration:
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* 00h = No LVDS, VBIOS does not enable LVDS
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* 01h = Int-LVDS, LFP driven by integrated LVDS decoder
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* 02h = SVDO-LVDS, LFP driven by SVDO decoder
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* 03h = eDP, LFP Driven by Int-DisplayPort encoder
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*/
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M.x86.R_AX = 0x005f;
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M.x86.R_CX = 1; /* Int-LVDS */
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break;
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case 0x5f70:
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switch (M.x86.R_CH) {
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case 0:
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/* Get Mux */
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M.x86.R_AX = 0x005f;
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M.x86.R_CL = 0;
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break;
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case 1:
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/* Set Mux */
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M.x86.R_AX = 0x005f;
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M.x86.R_CX = 0;
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break;
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case 2:
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/* Get SG/Non-SG mode */
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M.x86.R_AX = 0x005f;
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M.x86.R_CX = 0;
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break;
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default:
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/* Interrupt was not handled */
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printk(BIOS_DEBUG, "Unknown INT15 5f70 function: 0x%02x\n",
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M.x86.R_CH);
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return 0;
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}
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break;
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default:
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/* Interrupt was not handled */
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printk(BIOS_DEBUG, "Unknown INT15 function: 0x%04x\n",
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M.x86.R_AX);
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return 0;
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}
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/* Interrupt handled */
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return 1;
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}
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#endif
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE
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static void int15_install(void)
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{
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#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
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typedef int (*yabel_handleIntFunc)(void);
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extern yabel_handleIntFunc yabel_intFuncArray[256];
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yabel_intFuncArray[0x15] = int15_handler;
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#endif
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#ifdef CONFIG_PCI_OPTION_ROM_RUN_REALMODE
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mainboard_interrupt_handlers(0x15, &int15_handler);
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#endif
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}
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#endif
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/* Audio Setup */
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extern const u32 *cim_verb_data;
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extern u32 cim_verb_data_size;
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extern const u32 *pc_beep_verbs;
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extern u32 pc_beep_verbs_size;
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static void verb_setup(void)
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{
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cim_verb_data = mainboard_cim_verb_data;
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cim_verb_data_size = sizeof(mainboard_cim_verb_data);
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pc_beep_verbs = mainboard_pc_beep_verbs;
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pc_beep_verbs_size = mainboard_pc_beep_verbs_size;
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}
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static void mainboard_init(device_t dev)
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{
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char **vpd_region_ptr = NULL;
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u32 search_length = find_fmap_entry("RO_VPD", (void **)vpd_region_ptr);
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u32 search_address = (unsigned long)(*vpd_region_ptr);
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u16 io_base = 0;
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struct device *ethernet_dev = NULL;
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/* Initialize the Embedded Controller */
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butterfly_ec_init();
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/* Program EC Keyboard locale based on VPD data */
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program_keyboard_type(search_address, search_length);
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/* Get NIC's IO base address */
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ethernet_dev = dev_find_device(BUTTERFLY_NIC_VENDOR_ID,
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BUTTERFLY_NIC_DEVICE_ID, dev);
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if (ethernet_dev != NULL) {
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io_base = pci_read_config16(ethernet_dev, 0x10) & 0xfffe;
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/*
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* Battery life time - LAN PCIe should enter ASPM L1 to save
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* power when LAN connection is idle.
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* enable CLKREQ: LAN pci config space 0x81h=01
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*/
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pci_write_config8(ethernet_dev, 0x81, 0x01);
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}
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if (io_base) {
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/* Program MAC address based on VPD data */
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program_mac_address(io_base, search_address, search_length);
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/*
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* Program NIC LEDS
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*
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* RTL8105E Series EEPROM-Less Application Note,
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* Section 5.6 LED Mode Configuration
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*
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* Step1: Write C0h to I/O register 0x50 via byte access to
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* disable 'register protection'
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* Step2: Write xx001111b to I/O register 0x52 via byte access
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* (bit7 is LEDS1 and bit6 is LEDS0)
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* Step3: Write 0x00 to I/O register 0x50 via byte access to
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* enable 'register protection'
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*/
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outb(0xc0, io_base + 0x50); /* Disable protection */
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outb((BUTTERFLY_NIC_LED_MODE << 6) | 0x0f, io_base + 0x52);
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outb(0x00, io_base + 0x50); /* Enable register protection */
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}
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}
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static int butterfly_smbios_type41(int *handle, unsigned long *current,
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const char *name, u8 irq, u8 addr)
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{
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struct smbios_type41 *t = (struct smbios_type41 *)*current;
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int len = sizeof(struct smbios_type41);
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memset(t, 0, sizeof(struct smbios_type41));
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t->type = SMBIOS_ONBOARD_DEVICES_EXTENDED_INFORMATION;
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t->handle = *handle;
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t->length = len - 2;
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t->reference_designation = smbios_add_string(t->eos, name);
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t->device_type = SMBIOS_DEVICE_TYPE_OTHER;
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t->device_status = 1;
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t->device_type_instance = irq;
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t->segment_group_number = 0;
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t->bus_number = addr;
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t->function_number = 0;
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t->device_number = 0;
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len = t->length + smbios_string_table_len(t->eos);
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*current += len;
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*handle += 1;
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return len;
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}
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static int butterfly_onboard_smbios_data(device_t dev, int *handle,
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unsigned long *current)
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{
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int len = 0;
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len += butterfly_smbios_type41(handle, current,
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|
BUTTERFLY_TRACKPAD_NAME,
|
|
BUTTERFLY_TRACKPAD_IRQ,
|
|
BUTTERFLY_TRACKPAD_I2C_ADDR);
|
|
|
|
return len;
|
|
}
|
|
|
|
// mainboard_enable is executed as first thing after
|
|
// enumerate_buses().
|
|
|
|
static void mainboard_enable(device_t dev)
|
|
{
|
|
dev->ops->init = mainboard_init;
|
|
dev->ops->get_smbios_data = butterfly_onboard_smbios_data;
|
|
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE
|
|
/* Install custom int15 handler for VGA OPROM */
|
|
int15_install();
|
|
#endif
|
|
verb_setup();
|
|
}
|
|
|
|
struct chip_operations mainboard_ops = {
|
|
.enable_dev = mainboard_enable,
|
|
};
|