6114311c8e
Also, enable HIGH_TABLES support for this board.
The HIGH_TABLES failed with:
No matching ram area found for range:
[0x00000000000f0000, 0x0000000000100000)
Ram areas
[0x0000000000000000, 0x0000000000001000) Reserved
[0x0000000000001000, 0x00000000000a0000) RAM
[0x0000000000100000, 0x000000000fff0000) RAM
[0x000000000fff0000, 0x0000000010000000) Reserved
SELFBOOT RETURNED!
Boot failed.
The fix was to change northbridge.c as follows:
- ram_resource(dev, idx++, 1024, tolmk - 1024);
+ ram_resource(dev, idx++, 768, tolmk - 768);
This is build-tested and tested on hardware by me. It boots fine,
for instace with SeaBIOS and the standard GRUB1 from my disk.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4365 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
52 lines
1.4 KiB
Text
52 lines
1.4 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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target ms6178
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mainboard msi/ms6178
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option ROM_SIZE = 512 * 1024
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option MAINBOARD_VENDOR = "MSI"
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option MAINBOARD_PART_NUMBER = "MS-6178"
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option IRQ_SLOT_COUNT = 4
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option DEFAULT_CONSOLE_LOGLEVEL = 9
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option MAXIMUM_CONSOLE_LOGLEVEL = 9
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option CONFIG_CONSOLE_VGA = 1
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option CONFIG_PCI_ROM_RUN = 1
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romimage "normal"
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option USE_FALLBACK_IMAGE = 0
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option COREBOOT_EXTRA_VERSION = ".0Normal"
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payload /tmp/filo.elf
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end
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romimage "fallback"
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option USE_FALLBACK_IMAGE = 1
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option COREBOOT_EXTRA_VERSION = ".0Fallback"
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payload /tmp/filo.elf
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end
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buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
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# pci_rom i810.vga vendor_id=0x8086 device_id=0x7120
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