581 lines
15 KiB
C
581 lines
15 KiB
C
/*
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* This software and ancillary information (herein called SOFTWARE )
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* called LinuxBIOS is made available under the terms described
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* here. The SOFTWARE has been approved for release with associated
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* LA-CC Number 00-34 . Unless otherwise indicated, this SOFTWARE has
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* been authored by an employee or employees of the University of
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* California, operator of the Los Alamos National Laboratory under
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* Contract No. W-7405-ENG-36 with the U.S. Department of Energy. The
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* U.S. Government has rights to use, reproduce, and distribute this
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* SOFTWARE. The public may copy, distribute, prepare derivative works
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* and publicly display this SOFTWARE without charge, provided that this
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* Notice and any statement of authorship are reproduced on all copies.
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* Neither the Government nor the University makes any warranty, express
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* or implied, or assumes any liability or responsibility for the use of
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* this SOFTWARE. If SOFTWARE is modified to produce derivative works,
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* such modified SOFTWARE should be clearly marked, so as not to confuse
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* it with the version available from LANL.
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*/
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/*
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* This file is part of the coreboot project.
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*
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* (c) Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL
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* Copyright (C) 2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <string.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <x86emu/x86emu.h>
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#include "x86emu/prim_ops.h"
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#define DATA_SEGMENT 0x2000
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#define STACK_SEGMENT 0x1000 //1000:xxxx
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#define STACK_START_OFFSET 0xfffe
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#define INITIAL_EBDA_SEGMENT 0xF600 // segment of the Extended BIOS Data Area
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#define INITIAL_EBDA_SIZE 0x400 // size of the EBDA (at least 1KB!! since size is stored in KB!)
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enum {
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PCI_BIOS_PRESENT = 0xB101,
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FIND_PCI_DEVICE = 0xB102,
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FIND_PCI_CLASS_CODE = 0xB103,
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GENERATE_SPECIAL_CYCLE = 0xB106,
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READ_CONFIG_BYTE = 0xB108,
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READ_CONFIG_WORD = 0xB109,
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READ_CONFIG_DWORD = 0xB10A,
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WRITE_CONFIG_BYTE = 0xB10B,
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WRITE_CONFIG_WORD = 0xB10C,
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WRITE_CONFIG_DWORD = 0xB10D,
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GET_IRQ_ROUTING_OPTIONS = 0xB10E,
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SET_PCI_IRQ = 0xB10F
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};
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enum {
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SUCCESSFUL = 0x00,
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FUNC_NOT_SUPPORTED = 0x81,
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BAD_VENDOR_ID = 0x83,
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DEVICE_NOT_FOUND = 0x86,
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BAD_REGISTER_NUMBER = 0x87,
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SET_FAILED = 0x88,
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BUFFER_TOO_SMALL = 0x89
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};
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#define MEM_WB(where, what) wrb(where, what)
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#define MEM_WW(where, what) wrw(where, what)
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#define MEM_WL(where, what) wrl(where, what)
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#define MEM_RB(where) rdb(where)
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#define MEM_RW(where) rdw(where)
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#define MEM_RL(where) rdl(where)
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static u8 biosemu_inb(u16 port)
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{
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u8 val;
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val = inb(port);
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#ifdef CONFIG_DEBUG
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if (port != 0x40)
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printk("inb(0x%04x) = 0x%02x\n", port, val);
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#endif
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return val;
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}
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static u16 biosemu_inw(u16 port)
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{
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u16 val;
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val = inw(port);
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#ifdef CONFIG_DEBUG
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printk("inw(0x%04x) = 0x%04x\n", port, val);
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#endif
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return val;
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}
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static u32 biosemu_inl(u16 port)
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{
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u32 val;
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val = inl(port);
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#ifdef CONFIG_DEBUG
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printk("inl(0x%04x) = 0x%08x\n", port, val);
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#endif
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return val;
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}
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static void biosemu_outb(u16 port, u8 val)
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{
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#ifdef CONFIG_DEBUG
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if (port != 0x43)
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printk("outb(0x%02x, 0x%04x)\n", val, port);
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#endif
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outb(val, port);
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}
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static void biosemu_outw(u16 port, u16 val)
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{
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#ifdef CONFIG_DEBUG
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printk("outw(0x%04x, 0x%04x)\n", val, port);
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#endif
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outw(val, port);
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}
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static void biosemu_outl(u16 port, u32 val)
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{
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#ifdef CONFIG_DEBUG
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printk("outl(0x%08x, 0x%04x)\n", val, port);
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#endif
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outl(val, port);
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}
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static X86EMU_pioFuncs biosemu_piofuncs = {
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biosemu_inb, biosemu_inw, biosemu_inl,
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biosemu_outb, biosemu_outw, biosemu_outl
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};
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/* Interrupt Handlers */
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static int int15_handler(void)
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{
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/* This int15 handler is VIA Tech. and Intel specific. Other chipsets need other
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* handlers. The right way to do this is to move this handler code into
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* the mainboard or northbridge code.
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*/
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switch (X86_AX) {
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case 0x5f19:
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X86_EFLAGS |= FB_CF; /* set carry flag */
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break;
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case 0x5f18:
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X86_EAX = 0x5f;
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// MCLK = 133, 32M frame buffer, 256 M main memory
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X86_EBX = 0x545;
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X86_ECX = 0x060;
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X86_EFLAGS &= ~FB_CF;
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break;
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case 0x5f00:
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X86_EAX = 0x8600;
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X86_EFLAGS |= FB_CF; /* set carry flag */
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break;
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case 0x5f01:
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X86_EAX = 0x5f;
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X86_ECX = (X86_ECX & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
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X86_EFLAGS &= ~FB_CF;
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break;
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case 0x5f02:
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X86_EAX = 0x5f;
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X86_EBX = (X86_EBX & 0xffff0000) | 2;
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X86_ECX = (X86_ECX & 0xffff0000) | 0x401; // PAL + crt only
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X86_EDX = (X86_EDX & 0xffff0000) | 0; // TV Layout - default
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X86_EFLAGS &= ~FB_CF;
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break;
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case 0x5f0f:
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X86_EAX = 0x860f;
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X86_EFLAGS |= FB_CF; /* set carry flag */
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break;
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/* And now Intel IGD code */
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#define BOOT_DISPLAY_DEFAULT 0
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#define BOOT_DISPLAY_CRT (1 << 0)
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#define BOOT_DISPLAY_TV (1 << 1)
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#define BOOT_DISPLAY_EFP (1 << 2)
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#define BOOT_DISPLAY_LCD (1 << 3)
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#define BOOT_DISPLAY_CRT2 (1 << 4)
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#define BOOT_DISPLAY_TV2 (1 << 5)
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#define BOOT_DISPLAY_EFP2 (1 << 6)
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#define BOOT_DISPLAY_LCD2 (1 << 7)
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case 0x5f35:
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X86_EAX = 0x5f;
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X86_ECX = BOOT_DISPLAY_DEFAULT;
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X86_EFLAGS &= ~FB_CF;
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break;
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case 0x5f40:
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X86_EAX = 0x5f;
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X86_ECX = 3; // This is mainboard specific
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printk("DISPLAY=%x\n", X86_ECX);
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X86_EFLAGS &= ~FB_CF;
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break;
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default:
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printk("Unknown INT15 function %04x!\n", X86_AX);
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X86_EFLAGS |= FB_CF; /* set carry flag */
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}
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return 1;
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}
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static int int1a_handler(void)
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{
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int ret = 0;
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struct device *dev = 0;
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switch (X86_AX) {
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case PCI_BIOS_PRESENT:
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X86_AH = 0x00; /* no config space/special cycle support */
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X86_AL = 0x01; /* config mechanism 1 */
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X86_EDX = 'P' | 'C' << 8 | 'I' << 16 | ' ' << 24;
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X86_EBX = 0x0210; /* Version 2.10 */
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X86_ECX = 0xFF00; /* FIXME: Max bus number */
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X86_EFLAGS &= ~FB_CF; /* clear carry flag */
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ret = 1;
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break;
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case FIND_PCI_DEVICE:
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/* FIXME: support SI != 0 */
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dev = dev_find_device(X86_DX, X86_CX, dev);
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if (dev != 0) {
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X86_BH = dev->bus->secondary;
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X86_BL = dev->path.pci.devfn;
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X86_AH = SUCCESSFUL;
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X86_EFLAGS &= ~FB_CF; /* clear carry flag */
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ret = 1;
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} else {
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X86_AH = DEVICE_NOT_FOUND;
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X86_EFLAGS |= FB_CF; /* set carry flag */
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ret = 0;
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}
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break;
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case FIND_PCI_CLASS_CODE:
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/* FixME: support SI != 0 */
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dev = dev_find_class(X86_ECX, dev);
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if (dev != 0) {
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X86_BH = dev->bus->secondary;
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X86_BL = dev->path.pci.devfn;
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X86_AH = SUCCESSFUL;
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X86_EFLAGS &= ~FB_CF; /* clear carry flag */
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ret = 1;
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} else {
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X86_AH = DEVICE_NOT_FOUND;
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X86_EFLAGS |= FB_CF; /* set carry flag */
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ret = 0;
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}
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break;
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case READ_CONFIG_BYTE:
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dev = dev_find_slot(X86_BH, X86_BL);
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if (dev != 0) {
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X86_CL = pci_read_config8(dev, X86_DI);
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X86_AH = SUCCESSFUL;
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X86_EFLAGS &= ~FB_CF; /* clear carry flag */
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ret = 1;
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} else {
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X86_AH = DEVICE_NOT_FOUND;
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X86_EFLAGS |= FB_CF; /* set carry flag */
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ret = 0;
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}
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break;
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case READ_CONFIG_WORD:
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dev = dev_find_slot(X86_BH, X86_BL);
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if (dev != 0) {
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X86_CX = pci_read_config16(dev, X86_DI);
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X86_AH = SUCCESSFUL;
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X86_EFLAGS &= ~FB_CF; /* clear carry flag */
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ret = 1;
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} else {
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X86_AH = DEVICE_NOT_FOUND;
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X86_EFLAGS |= FB_CF; /* set carry flag */
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ret = 0;
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}
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break;
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case READ_CONFIG_DWORD:
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dev = dev_find_slot(X86_BH, X86_BL);
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if (dev != 0) {
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X86_ECX = pci_read_config32(dev, X86_DI);
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X86_AH = SUCCESSFUL;
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X86_EFLAGS &= ~FB_CF; /* clear carry flag */
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ret = 1;
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} else {
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X86_AH = DEVICE_NOT_FOUND;
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X86_EFLAGS |= FB_CF; /* set carry flag */
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ret = 0;
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}
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break;
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case WRITE_CONFIG_BYTE:
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dev = dev_find_slot(X86_BH, X86_BL);
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if (dev != 0) {
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pci_write_config8(dev, X86_DI, X86_CL);
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X86_AH = SUCCESSFUL;
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X86_EFLAGS &= ~FB_CF; /* clear carry flag */
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ret = 1;
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} else {
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X86_AH = DEVICE_NOT_FOUND;
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X86_EFLAGS |= FB_CF; /* set carry flag */
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ret = 0;
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}
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break;
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case WRITE_CONFIG_WORD:
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dev = dev_find_slot(X86_BH, X86_BL);
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if (dev != 0) {
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pci_write_config16(dev, X86_DI, X86_CX);
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X86_AH = SUCCESSFUL;
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X86_EFLAGS &= ~FB_CF; /* clear carry flag */
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ret = 1;
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} else {
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X86_AH = DEVICE_NOT_FOUND;
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X86_EFLAGS |= FB_CF; /* set carry flag */
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ret = 0;
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}
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break;
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case WRITE_CONFIG_DWORD:
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dev = dev_find_slot(X86_BH, X86_BL);
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if (dev != 0) {
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pci_write_config16(dev, X86_DI, X86_ECX);
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X86_AH = SUCCESSFUL;
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X86_EFLAGS &= ~FB_CF; /* clear carry flag */
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ret = 1;
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} else {
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X86_AH = DEVICE_NOT_FOUND;
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X86_EFLAGS |= FB_CF; /* set carry flag */
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ret = 0;
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}
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break;
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default:
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X86_AH = FUNC_NOT_SUPPORTED;
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X86_EFLAGS |= FB_CF;
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break;
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}
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return ret;
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}
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/* Interrupt multiplexer */
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/* Find base address of interrupt handler */
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static u32 getIntVect(int num)
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{
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return MEM_RW(num << 2) + (MEM_RW((num << 2) + 2) << 4);
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}
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static int run_bios_int(int num)
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{
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u32 eflags;
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eflags = X86_EFLAGS;
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push_word(eflags);
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push_word(X86_CS);
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push_word(X86_IP);
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X86_CS = MEM_RW((num << 2) + 2);
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X86_IP = MEM_RW(num << 2);
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return 1;
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}
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static void do_int(int num)
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{
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int ret = 0;
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printk("int%x (AX=%04x) vector at %x\n", num, X86_AX, getIntVect(num));
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switch (num) {
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case 0x10:
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case 0x42:
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case 0x6D:
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if (getIntVect(num) == 0x0000) {
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printk("uninitialized interrupt vector\n");
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ret = 1;
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}
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if (getIntVect(num) == 0xFF065) {
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//ret = int42_handler();
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ret = 1;
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}
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break;
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case 0x15:
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ret = int15_handler();
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ret = 1;
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break;
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case 0x16:
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//ret = int16_handler();
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ret = 0;
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break;
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case 0x1A:
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ret = int1a_handler();
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ret = 1;
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break;
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case 0xe6:
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//ret = intE6_handler();
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ret = 0;
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break;
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default:
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break;
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}
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if (!ret)
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ret = run_bios_int(num);
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}
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/*
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* here we are really paranoid about faking a "real"
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* BIOS. Most of this information was pulled from
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* dosemu.
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*/
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static void setup_system_bios(void)
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{
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int i;
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|
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/* Set up Interrupt Vectors. The IVT starts at 0x0000:0x0000
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* Additionally, we put some stub code into the F segment for
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* those pesky little buggers that jmp to the hard coded addresses
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* instead of calling int XX. This stub code looks like this
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*
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* CD XX int 0xXX
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* C3 ret
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* F4 hlt
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*/
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/* int 05 default location (Bound Exceeded) */
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MEM_WL(0x05 << 2, 0xf000ff54);
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MEM_WL(0xfff54, 0xf4c305cd);
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/* int 08 default location (Double Fault) */
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MEM_WL(0x08 << 2, 0xf000fea5);
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MEM_WL(0xffea5, 0xf4c308cd);
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/* int 0E default location (Page Fault) */
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MEM_WL(0x0e << 2, 0xf000ef57);
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MEM_WL(0xfef57, 0xf4c30ecd);
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/* int 10 default location */
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MEM_WL(0x10 << 2, 0xf000f065);
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MEM_WL(0xff065, 0xf4c310cd);
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/* int 11 default location (Get Equipment Configuration) */
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MEM_WL(0x11 << 2, 0xf000f84d);
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MEM_WL(0xff84d, 0xf4c311cd);
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/* int 12 default location (Get Conventional Memory Size) */
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MEM_WL(0x12 << 2, 0xf000f841);
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MEM_WL(0xff841, 0xf4c312cd);
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/* int 13 default location (Disk) */
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MEM_WL(0x13 << 2, 0xf000ec59);
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MEM_WL(0xfec59, 0xf4c313cd);
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/* int 14 default location (Disk) */
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MEM_WL(0x14 << 2, 0xf000e739);
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MEM_WL(0xfe739, 0xf4c314cd);
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/* int 15 default location (I/O System Extensions) */
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MEM_WL(0x15 << 2, 0xf000f859);
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MEM_WL(0xf859, 0xf4c315cd);
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/* int 16 default location */
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MEM_WL(0x16 << 2, 0xf000e82e);
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MEM_WL(0xfe82e, 0xf4c316cd);
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/* int 17 default location (Parallel Port) */
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MEM_WL(0x17 << 2, 0xf000efd2);
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MEM_WL(0xfefd2, 0xf4c317cd);
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/* int 1A default location (RTC, PCI and others) */
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MEM_WL(0x1a << 2, 0xf000fe6e);
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MEM_WL(0xffe6e, 0xf4c31acd);
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/* int 1E default location (FDD table) */
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MEM_WL(0x1e << 2, 0xf000efc7);
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MEM_WL(0xfefc7, 0xf4c31ecd);
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/* font tables default location (int 1F) */
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MEM_WL(0x1f << 2, 0xf000fa6e);
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MEM_WL(0xffa6e, 0xf4c31fcd);
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/* int 42 default location */
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MEM_WL(0x42 << 2, 0xf000f065);
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/* int 6D default location */
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MEM_WL(0x6D << 2, 0xf000f065);
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|
|
/* Clear EBDA */
|
|
for (i=(INITIAL_EBDA_SEGMENT << 4);
|
|
i<(INITIAL_EBDA_SEGMENT << 4) + INITIAL_EBDA_SIZE; i++)
|
|
MEM_WB(i, 0);
|
|
/* at offset 0h in EBDA is the size of the EBDA in KB */
|
|
MEM_WW((INITIAL_EBDA_SEGMENT << 4) + 0x0, INITIAL_EBDA_SIZE / 1024);
|
|
|
|
/* Clear BDA */
|
|
for (i=0x400; i<0x500; i+=4)
|
|
MEM_WL(i, 0);
|
|
|
|
/* Set up EBDA */
|
|
MEM_WW(0x40e, INITIAL_EBDA_SEGMENT);
|
|
|
|
/* Set RAM size to 16MB (fake) */
|
|
MEM_WW(0x413, 16384);
|
|
|
|
// TODO Set up more of BDA here
|
|
|
|
/* setup original ROM BIOS Area (F000:xxxx) */
|
|
const char *date = "06/23/99";
|
|
for (i = 0; date[i]; i++)
|
|
MEM_WB(0xffff5 + i, date[i]);
|
|
/* set up eisa ident string */
|
|
const char *ident = "PCI_ISA";
|
|
for (i = 0; ident[i]; i++)
|
|
MEM_WB(0xfffd9 + i, ident[i]);
|
|
|
|
// write system model id for IBM-AT
|
|
// according to "Ralf Browns Interrupt List" Int15 AH=C0 Table 515,
|
|
// model FC is the original AT and also used in all DOSEMU Versions.
|
|
MEM_WB(0xFFFFE, 0xfc);
|
|
}
|
|
|
|
#define BIOSEMU_MEM_BASE 0x00000000
|
|
#define BIOSEMU_MEM_SIZE 0x00100000
|
|
void run_bios(struct device * dev, unsigned long addr)
|
|
{
|
|
int i;
|
|
u16 initialcs = (addr & 0xF0000) >> 4;
|
|
u16 initialip = (addr + 3) & 0xFFFF;
|
|
u16 devfn = (dev->bus->secondary << 8) | dev->path.pci.devfn;
|
|
X86EMU_intrFuncs intFuncs[256];
|
|
|
|
X86EMU_setMemBase(BIOSEMU_MEM_BASE, BIOSEMU_MEM_SIZE);
|
|
X86EMU_setupPioFuncs(&biosemu_piofuncs);
|
|
for (i = 0; i < 256; i++)
|
|
intFuncs[i] = do_int;
|
|
X86EMU_setupIntrFuncs(intFuncs);
|
|
|
|
setup_system_bios();
|
|
|
|
/* cpu setup */
|
|
X86_AX = devfn ? devfn : 0xff;
|
|
X86_DX = 0x80;
|
|
X86_EIP = initialip;
|
|
X86_CS = initialcs;
|
|
|
|
/* Initialize stack and data segment */
|
|
X86_SS = STACK_SEGMENT;
|
|
X86_SP = STACK_START_OFFSET;;
|
|
X86_DS = DATA_SEGMENT;
|
|
|
|
/* We need a sane way to return from bios
|
|
* execution. A hlt instruction and a pointer
|
|
* to it, both kept on the stack, will do.
|
|
*/
|
|
push_word(0xf4f4); /* hlt; hlt */
|
|
push_word(X86_SS);
|
|
push_word(X86_SP + 2);
|
|
|
|
#ifdef CONFIG_DEBUG
|
|
//X86EMU_trace_on();
|
|
#endif
|
|
|
|
printk("Executing Initialization Vector...\n");
|
|
X86EMU_exec();
|
|
printk("Option ROM Exit Status: %04x\n", X86_AX);
|
|
|
|
/* Check whether the stack is "clean" i.e. containing the HLT
|
|
* instruction we pushed before executing and pointing to the original
|
|
* stack address... indicating that the initialization probably was
|
|
* successful
|
|
*/
|
|
if ((pop_word() == 0xf4f4) && (X86_SS == STACK_SEGMENT)
|
|
&& (X86_SP == STACK_START_OFFSET)) {
|
|
printk("Stack is clean, initialization successfull!\n");
|
|
} else {
|
|
printk("Stack unclean, initialization probably NOT COMPLETE!!\n");
|
|
printk("SS:SP = %04x:%04x, expected: %04x:%04x\n",
|
|
X86_SS, X86_SP, STACK_SEGMENT, STACK_START_OFFSET);
|
|
}
|
|
}
|