546923f906
The FSP can only output its traces when the HSUART PCI device is available. - Move the hiding to after last FSP call. - Adapt coreboot PCI enumeration to keep the legacy configuration. With UART configured as legacy Linux will not re-enumerate it but detects it as legacy (ttyS0 instead of ttyS4). Change-Id: Id8801e178ffd8eeee78ece07da7bd6b8dbd88538 Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net> Reviewed-on: https://review.coreboot.org/23623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
92 lines
2.5 KiB
C
92 lines
2.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 - 2017 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* The sole purpose of this driver is to avoid BAR to be changed during
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* resource allocation. Since configuration space is just 32 bytes it
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* shouldn't cause any fragmentation.
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*/
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#include <console/uart.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <soc/pci_devs.h>
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#include <console/console.h>
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#include <soc/uart.h>
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#include <fsp/api.h>
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static void dnv_ns_uart_read_resources(struct device *dev)
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{
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/* read resources to be visible in the log*/
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pci_dev_read_resources(dev);
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if (!IS_ENABLED(CONFIG_LEGACY_UART_MODE))
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return;
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struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res == NULL)
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return;
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res->size = 0x8;
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res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
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/* Do not configure membar */
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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if (res != NULL)
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res->flags = 0;
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compact_resources(dev);
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}
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static struct device_operations uart_ops = {
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.read_resources = dnv_ns_uart_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = pci_dev_init,
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.enable = DEVICE_NOOP
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};
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static const unsigned short uart_ids[] = {
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HSUART_DEVID, /* HSUART 0/1/2 */
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0
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};
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static const struct pci_driver uart_driver __pci_driver = {
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.ops = &uart_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = uart_ids
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};
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static void hide_hsuarts(void)
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{
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int i;
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printk(BIOS_DEBUG, "HIDING HSUARTs.\n");
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/* There is a hardware requirement to hide functions starting from the
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last one. */
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for (i = DENVERTON_UARTS_TO_INI - 1; i >= 0; i--) {
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struct device *uart_dev;
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uart_dev = dev_find_slot(0, PCI_DEVFN(HSUART_DEV, i));
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if (uart_dev == NULL)
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continue;
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pci_or_config32(uart_dev, PCI_FUNC_RDCFG_HIDE, 1);
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}
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}
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/* Hide HSUART PCI device very last when FSP no longer needs it */
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void platform_fsp_notify_status(enum fsp_notify_phase phase)
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{
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if (phase != END_OF_FIRMWARE)
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return;
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if (IS_ENABLED(CONFIG_LEGACY_UART_MODE))
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hide_hsuarts();
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}
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