1c6d8a9cf4
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I4c110f60b764c97fab2a29f6f04680196f156da5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39610 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
108 lines
3.2 KiB
C
108 lines
3.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/mmio.h>
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#include <soc/addressmap.h>
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#include <soc/flow_ctrl.h>
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#define FLOW_CTRL_HALT_CPU0_EVENTS 0x0
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#define FLOW_CTRL_WAITEVENT (2 << 29)
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#define FLOW_CTRL_WAIT_FOR_INTERRUPT (4 << 29)
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#define FLOW_CTRL_HALT_SCLK (1 << 27)
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#define FLOW_CTRL_HALT_LIC_IRQ (1 << 11)
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#define FLOW_CTRL_HALT_LIC_FIQ (1 << 10)
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#define FLOW_CTRL_HALT_GIC_IRQ (1 << 9)
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#define FLOW_CTRL_HALT_GIC_FIQ (1 << 8)
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#define FLOW_CTRL_CPU0_CSR 0x8
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#define FLOW_CTRL_CSR_INTR_FLAG (1 << 15)
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#define FLOW_CTRL_CSR_EVENT_FLAG (1 << 14)
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#define FLOW_CTRL_CSR_WFI_CPU0 (1 << 8)
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#define FLOW_CTRL_CSR_WFI_BITMAP (0xF << 8)
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#define FLOW_CTRL_CSR_WFE_BITMAP (0xF << 4)
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#define FLOW_CTRL_CSR_ENABLE (1 << 0)
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#define FLOW_CTRL_HALT_CPU1_EVENTS 0x14
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#define FLOW_CTRL_CPU1_CSR 0x18
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#define FLOW_CTRL_CC4_CORE0_CTRL 0x6c
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static void *tegra_flowctrl_base = (void *)TEGRA_FLOW_BASE;
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static const uint8_t flowctrl_offset_halt_cpu[] = {
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FLOW_CTRL_HALT_CPU0_EVENTS,
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FLOW_CTRL_HALT_CPU1_EVENTS,
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FLOW_CTRL_HALT_CPU1_EVENTS + 8,
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FLOW_CTRL_HALT_CPU1_EVENTS + 16
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};
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static const uint8_t flowctrl_offset_cpu_csr[] = {
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FLOW_CTRL_CPU0_CSR,
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FLOW_CTRL_CPU1_CSR,
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FLOW_CTRL_CPU1_CSR + 8,
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FLOW_CTRL_CPU1_CSR + 16
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};
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static const uint8_t flowctrl_offset_cc4_ctrl[] = {
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FLOW_CTRL_CC4_CORE0_CTRL,
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FLOW_CTRL_CC4_CORE0_CTRL + 4,
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FLOW_CTRL_CC4_CORE0_CTRL + 8,
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FLOW_CTRL_CC4_CORE0_CTRL + 12
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};
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void flowctrl_write_cpu_csr(int cpu, uint32_t val)
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{
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write32(tegra_flowctrl_base + flowctrl_offset_cpu_csr[cpu], val);
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val = read32(tegra_flowctrl_base + flowctrl_offset_cpu_csr[cpu]);
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}
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void flowctrl_write_cpu_halt(int cpu, uint32_t val)
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{
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write32(tegra_flowctrl_base + flowctrl_offset_halt_cpu[cpu], val);
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val = read32(tegra_flowctrl_base + flowctrl_offset_halt_cpu[cpu]);
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}
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void flowctrl_write_cc4_ctrl(int cpu, uint32_t val)
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{
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write32(tegra_flowctrl_base + flowctrl_offset_cc4_ctrl[cpu], val);
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val = read32(tegra_flowctrl_base + flowctrl_offset_cc4_ctrl[cpu]);
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}
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void flowctrl_cpu_off(int cpu)
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{
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uint32_t val = FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG |
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FLOW_CTRL_CSR_ENABLE | (FLOW_CTRL_CSR_WFI_CPU0 << cpu);
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flowctrl_write_cpu_csr(cpu, val);
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flowctrl_write_cpu_halt(cpu, FLOW_CTRL_WAITEVENT);
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flowctrl_write_cc4_ctrl(cpu, 0);
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}
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void flowctrl_cpu_on(int cpu)
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{
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flowctrl_write_cpu_csr(cpu, FLOW_CTRL_CSR_ENABLE);
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flowctrl_write_cpu_halt(cpu, FLOW_CTRL_WAITEVENT |
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FLOW_CTRL_HALT_SCLK);
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}
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void flowctrl_cpu_suspend(int cpu)
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{
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uint32_t val;
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val = FLOW_CTRL_HALT_GIC_IRQ | FLOW_CTRL_HALT_GIC_FIQ |
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FLOW_CTRL_HALT_LIC_IRQ | FLOW_CTRL_HALT_LIC_FIQ |
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FLOW_CTRL_WAITEVENT;
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flowctrl_write_cpu_halt(cpu, val);
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val = FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG |
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FLOW_CTRL_CSR_ENABLE | (FLOW_CTRL_CSR_WFI_CPU0 << cpu);
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flowctrl_write_cpu_csr(cpu, val);
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}
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