coreboot-kgpe-d16/src/boot/hardwaremain.c
Patrick Georgi aed1f925a6 the attached patch is the last infrastructure change necessary for
romfs.
Everything else to make a target romfs aware happens in the targets.

What the patch does:
1. missing romfs.h include
2. special handling while creating coreboot.rom
While the romfs code path in the makefile doesn't actually use the file,
it's possible that the build of coreboot.rom fails in a romfs setup,
because the individual buildrom image is too small to host both coreboot
and payloads (as the payloads aren't supposed to be there). Thus, a
special case to replace the payload with /dev/null in case of a romfs
build.
There would be cleaner ways, but they're not easily encoded in the
Config.lb format.
3. config.g is changed to create rules for a romfs build

Targets should still build (they do for me)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 12:52:43 +00:00

109 lines
3 KiB
C

/*
This software and ancillary information (herein called SOFTWARE )
called LinuxBIOS is made available under the terms described
here. The SOFTWARE has been approved for release with associated
LA-CC Number 00-34 . Unless otherwise indicated, this SOFTWARE has
been authored by an employee or employees of the University of
California, operator of the Los Alamos National Laboratory under
Contract No. W-7405-ENG-36 with the U.S. Department of Energy. The
U.S. Government has rights to use, reproduce, and distribute this
SOFTWARE. The public may copy, distribute, prepare derivative works
and publicly display this SOFTWARE without charge, provided that this
Notice and any statement of authorship are reproduced on all copies.
Neither the Government nor the University makes any warranty, express
or implied, or assumes any liability or responsibility for the use of
this SOFTWARE. If SOFTWARE is modified to produce derivative works,
such modified SOFTWARE should be clearly marked, so as not to confuse
it with the version available from LANL.
*/
/* Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL
* rminnich@lanl.gov
*/
/*
* C Bootstrap code for the coreboot
*/
#include <console/console.h>
#include <version.h>
#include <boot/tables.h>
#include <device/device.h>
#include <device/pci.h>
#include <delay.h>
#include <stdlib.h>
#include <part/hard_reset.h>
#include <part/init_timer.h>
#include <boot/elf.h>
#include <romfs.h>
/**
* @brief Main function of the DRAM part of coreboot.
*
* Coreboot is divided into Pre-DRAM part and DRAM part.
*
*
* Device Enumeration:
* In the dev_enumerate() phase,
*/
void hardwaremain(int boot_complete)
{
struct lb_memory *lb_mem;
post_code(0x80);
/* displayinit MUST PRECEDE ALL PRINTK! */
console_init();
post_code(0x39);
printk_notice("coreboot-%s%s %s %s...\n",
coreboot_version, coreboot_extra_version, coreboot_build,
(boot_complete)?"rebooting":"booting");
post_code(0x40);
/* If we have already booted attempt a hard reboot */
if (boot_complete) {
hard_reset();
}
/* FIXME: Is there a better way to handle this? */
init_timer();
/* Find the devices we don't have hard coded knowledge about. */
dev_enumerate();
post_code(0x66);
/* Now compute and assign the bus resources. */
dev_configure();
post_code(0x88);
/* Now actually enable devices on the bus */
dev_enable();
/* And of course initialize devices on the bus */
dev_initialize();
post_code(0x89);
/* Now that we have collected all of our information
* write our configuration tables.
*/
lb_mem = write_tables();
#if CONFIG_ROMFS == 1
# if USE_FALLBACK_IMAGE == 1
void (*pl)(void) = romfs_load_payload(lb_mem, "fallback/payload");
# else
void (*pl)(void) = romfs_load_payload(lb_mem, "normal/payload");
# endif
#endif
#if CONFIG_FS_PAYLOAD == 1
#warning "CONFIG_FS_PAYLOAD is deprecated."
filo(lb_mem);
#else
#warning "elfboot will soon be deprecated."
elfboot(lb_mem);
#endif
printk_err("Boot failed.\n");
}