coreboot-kgpe-d16/src/soc
Raul E Rangel a76e647094 soc/amd/common/block/cpu: Remove magic number in memlayout
The SPI DMA controller can only perform transactions on a cache line
boundary. This change removes the magic number and uses the #define to
make it clear.

BUG=b:179699789
TEST=Boot guybrush to OS

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ie7b851dc2433e44a23224c3ff733fdea5fbcca0c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58377
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-10-20 15:49:23 +00:00
..
amd soc/amd/common/block/cpu: Remove magic number in memlayout 2021-10-20 15:49:23 +00:00
cavium src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
example src: Introduce `ARCH_ALL_STAGES_X86` 2021-07-02 08:19:10 +00:00
intel soc/intel/alderlake: Fix wrong FIVR configs assignment 2021-10-20 15:48:38 +00:00
mediatek soc/mediatek/mt8192: add tracker dump 2021-10-13 13:58:01 +00:00
nvidia src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
qualcomm sc7280: Add GSI FW download support 2021-10-18 18:28:53 +00:00
rockchip mipi: Make panel init callback work directly on DSI transaction types 2021-09-11 01:42:47 +00:00
samsung src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
sifive src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
ti
ucb