GNUBoot/coreboot-kgpe-d16
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coreboot-kgpe-d16/src/mainboard/google/reef/variants/baseboard
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Duncan Laurie 401bd31b2d mainboard/google/reef: Enable cr50 TPM interrupt 
Enable the cr50 TPM and interrupt as GPE0_DW1_28 for use during
verstage.  The interrupt is left in APIC mode as the GPE is
still latched when the GPIO is pulled low.

BUG=chrome-os-partner:53336

Change-Id: Ib0247653bdcbaccb645cd16b81d7ec3c38f669af
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16673
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-21 10:47:02 +02:00
..
include/baseboard mainboard/reef: add variant support to ASL code 2016-09-15 23:33:45 +02:00
boardid.c mainboard/google/reef: add variant API for board_id and gpio 2016-09-06 20:04:18 +02:00
devicetree.cb mainboard/google/reef: Configure WLAN as wake source 2016-09-19 19:33:31 +02:00
gpio.c mainboard/google/reef: Enable cr50 TPM interrupt 2016-09-21 10:47:02 +02:00
Makefile.inc mainboard/google/reef: add baseboard nhlt configuration 2016-09-06 20:16:56 +02:00
memory.c mainboard/google/reef: drop remaining proto board references 2016-09-06 20:17:37 +02:00
nhlt.c mainboard/google/reef: add baseboard nhlt configuration 2016-09-06 20:16:56 +02:00