5348512451
This config is used to provide the name of a region where a microcode is located. The address of this will be added as the first entry in the FIT of the topswap bootblock. This adds a capability to associate two microcodes for each of the two bootblocks, this allows for the CPU to boot with different microcodes with 2 separate bootblocks. Change-Id: I4ee41d90bae34862aa68c9b8bd69288de1335585 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/27151 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
50 lines
1.7 KiB
Text
50 lines
1.7 KiB
Text
# Load all chipsets
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source "src/soc/intel/apollolake/Kconfig"
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source "src/soc/intel/baytrail/Kconfig"
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source "src/soc/intel/braswell/Kconfig"
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source "src/soc/intel/broadwell/Kconfig"
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source "src/soc/intel/cannonlake/Kconfig"
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source "src/soc/intel/denverton_ns/Kconfig"
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source "src/soc/intel/fsp_baytrail/Kconfig"
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source "src/soc/intel/fsp_broadwell_de/Kconfig"
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source "src/soc/intel/quark/Kconfig"
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source "src/soc/intel/sch/Kconfig"
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source "src/soc/intel/skylake/Kconfig"
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# Load common config
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source "src/soc/intel/common/Kconfig"
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config INTEL_HAS_TOP_SWAP
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bool
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help
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Set this config if the Intel SoC supports top swap feature
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config INTEL_ADD_TOP_SWAP_BOOTBLOCK
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bool "Include a Top swap bootblock"
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default n
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depends on INTEL_HAS_TOP_SWAP
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help
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Intel PCH/Southbridges have feature that it is possible to have
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the southbridge/PCH look for the bootblock at a 64K or
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128K/256K/512K/1MB (in case of newer SoCs) offset
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instead of the usual top of flash.
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Select this to put a 'second' bootblock.
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config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
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hex "Size of top swap boot block"
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depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
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default 0x10000
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help
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Set this config to a supported topswap size.
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Valid sizes: 0x10000 0x20000 0x40000 0x80000 0x100000
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config INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG
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string
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depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
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help
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Use this config to specify the name of a FMAP region (which should
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hold a microcode) whose address as the first entry in the topswap FIT.
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This is useful in creating a asymmetric FIT in top swap bootblock
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than the one in non-topswap bootblock. This string will be passed
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onto cbfstool (-q option). cbfstool will not parse the region for MCU
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entries, and only locate the region and insert its address into FIT.
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