Angel Pons 408d1dac9e mb/**/dsdt.asl: Remove outdated sleepstates.asl comment ... Previously, each Intel chipset had its own sleepstates.asl file. However, this is no longer the case, so drop these comments. Change-Id: I50aba6e74f41e2fa498375b5eb6b7e993d06bcac Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37855 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>		2019-12-31 15:16:57 +00:00
..
variants	mb/intel/coffeelake_rvp: Switch to overridetree setup	2019-12-05 21:25:33 +00:00
acpi_tables.c
board_info.txt
bootblock.c
chromeos.c	mb/*/chromeos.c: Remove some ENV_RAMSTAGE and __SIMPLE_DEVICE__	2019-07-25 16:03:37 +00:00
chromeos.fmd
chromeos_32MB.fmd
dsdt.asl	mb/**/dsdt.asl: Remove outdated sleepstates.asl comment	2019-12-31 15:16:57 +00:00
hda_verb.c
Kconfig	mb/intel/coffeelake_rvp: Switch to overridetree setup	2019-12-05 21:25:33 +00:00
Kconfig.name	src/mb/intel/coffeelake_rvp: Rename COMETLAKE_RVP to COMETLAKE_RVPU	2019-12-02 12:04:48 +00:00
mainboard.c
Makefile.inc
memory.c	soc/intel/cannonlake: Support different SPD read type for each slot	2019-05-15 17:47:13 +00:00
romstage.c	soc/intel/cannonlake: Support different SPD read type for each slot	2019-05-15 17:47:13 +00:00