4bab6e79b0
Change-Id: I6ea9b9d2353c0d767c837e6d629b45f23b306f6e Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14599 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
40 lines
1.3 KiB
Text
40 lines
1.3 KiB
Text
chip soc/intel/sch
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# IGD Displays
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register "gfx.ndid" = "3"
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register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
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# PIRQ routing
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register "pirqa_routing" = "0xa"
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register "pirqb_routing" = "0xb"
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register "pirqc_routing" = "0x5"
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register "pirqd_routing" = "0xf"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x80"
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device cpu_cluster 0 on
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chip cpu/intel/socket_441
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device lapic 0 on end
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end
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end
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device domain 0 on
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device pci 00.0 on end # host bridge
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device pci 02.0 on end # Integrated Graphics and Video Device
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device pci 1a.0 on end # 26 0 USB Client
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device pci 1b.0 on end # 27 0 HD Audio Controller
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device pci 1c.0 on end # 28 0 PCI Express Port 1
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device pci 1c.1 on end # 28 1 PCI Express Port 2
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device pci 1d.0 on end # USB Classic UHCI Controller 1
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device pci 1d.1 on end # USB Classic UHCI Controller 2
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device pci 1d.2 on end # USB Classic UHCI Controller 3
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device pci 1d.7 on end # USB2 EHCI Controller
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device pci 1e.0 on end # SDIO/MMC Port 0
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device pci 1e.1 on end # SDIO/MMC Port 1
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device pci 1e.2 on end # SDIO/MMC Port 2
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device pci 1f.0 on end # LPC bridge
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device pci 1f.1 on end # PATA Controller
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end
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end
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