5bb9fd6e4d
cache that range instead of the first 1Meg. This reduces boot time by about 1 second on epia-cn. This patch also adds a MTRRphysMaskValid bit definition. Signed-off-by: Kevin O'Connor <kevin@koconnor.net> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6272 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 |
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.. | ||
16bit | ||
32bit | ||
cache | ||
lapic | ||
mtrr | ||
name | ||
pae | ||
smm | ||
tsc | ||
fpu_enable.inc | ||
Kconfig | ||
mmx_disable.inc | ||
sse_disable.inc | ||
sse_enable.inc |