412222ae75
Add the headers for 2.2.3.1, which includes the following changes over 2.2.0.0: • [Implemented]GLK: XHCLKGTEN Register setting causes S0ix entry failure in less than 5 cycles when a USB2 Ethernet Dongle is connected. Refer GLK BIOS Spec Volume1 CDI# 571118 under chapter 7.20.6 for new Register settings. • [Implemented] [GLK/GLK-R] DDR4 16Gb SDP Memory support for Gemini Lake/Gemini Lake – R • [Update] MRC new version update to 1.38. • [Fixed][GLK-R][WLAN] Removed the DSW function - Wake on LAN from S4 issue with latest Wifi driver. [Update] MRC new version update to 1.39. Included fix for MinRefRate2xEnable and support for Rowhammer mitigation. • [Fixed] Disable Dynamic DiffAmp and set CTLE from 7 to 5. This change specific to DDR4 memory configuration. • GLK Klocwork Fix • [Update] MRC new version update to 1.40. Added in a separate directory as the default. The 2.2.0.0 headers were left and will be used for Google boards, as some offsets have moved. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I09498368b116c2add816eeada2fa4d0dba6e5765 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64533 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> |
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| Makefile.inc | ||