Sumeet Pawnikar 428f90afe7 soc/intel/apollolake: Set PL2 in RAPL register ... This patch sets the package power limit (PL2) value in RAPL register. BUG=chrome-os-partner:60535 TEST=Built, booted on reef and verified PL2 value. Change-Id: I83fe854cf3e9fc92ab87f84b86e64ebb6085065f Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/17699 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-12-08 16:13:23 +01:00
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broadcom/cygnus	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
dmp/vortex86ex	src/soc: Capitalize CPU, ACPI, RAM and ROM	2016-07-31 19:27:53 +02:00
imgtec/pistachio	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
intel	soc/intel/apollolake: Set PL2 in RAPL register	2016-12-08 16:13:23 +01:00
lowrisc/lowrisc	soc/lowrisc: Place CBMEM at top of autodetected RAM	2016-12-06 18:51:13 +01:00
marvell	soc/marvell/mvmap2315: Fix integer arithmetic	2016-12-06 18:50:27 +01:00
mediatek/mt8173	soc/mediatek/mt8173: Do not initialize static variables to 0	2016-12-07 17:15:56 +01:00
nvidia	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
qualcomm	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
rdc/r8610	rdc/r8610: Move to src/soc	2016-05-05 20:08:58 +02:00
rockchip	rockchip/rk3399: sdram: use register to calculate sdram sizes	2016-12-06 21:56:20 +01:00
samsung	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
ucb/riscv	soc/ucb/riscv: Place CBMEM at top of autodetected RAM	2016-12-06 18:48:28 +01:00