coreboot-kgpe-d16/src/security
Tim Wawrzynczak 6b8599f29a drivers/tpm/spi: Refactor out some cr50-specific logic
Mainboards accessing the cr50 over an I2C bus may want to reuse some of
the same firmware version and BOARD_CFG logic, therefore refactor this
logic out into a bus-agnostic file, drivers/tpm/cr50.c. This file uses
the new tis_vendor_read/write() functions in order to access the cr50
regardless of the bus which is physically used. In order to leave SPI
devices intact, the tis_vendor_* functions are added to the SPI driver.

BUG=b:202246591
TEST=boot to OS on google/dratini, see the same FW version and board_cfg
console prints as before the change.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ie68618cbe026a2b9221f93d0fe41d0b2054e8091
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61977
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
2022-03-07 18:06:24 +00:00
..
intel security/intel/stm: Make STM setup MP safe 2022-02-24 00:27:37 +00:00
lockdown security/intel: Add option to enable SMM flash access only 2021-06-21 08:11:11 +00:00
memory security/memory/memory.c: Include 'stdbool' instead of 'stdint' 2022-01-04 14:56:37 +00:00
tpm drivers/tpm/spi: Refactor out some cr50-specific logic 2022-03-07 18:06:24 +00:00
vboot console/cbmem_console: Rename cbmem_dump_console 2022-01-13 15:25:43 +00:00
Kconfig cbfs: Add verification for RO CBFS metadata hash 2020-12-03 00:11:08 +00:00
Makefile.inc