436f99b72a
which is normally set to 0x10 (the current default) and set to 0x80 (the current alternative) where necessary (if romstraps get in the way). For Kconfig, the special case is set per southbridge (as these define the necessity for this workaround), for newconfig it's added to each single board. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
473 lines
9.6 KiB
Text
473 lines
9.6 KiB
Text
##
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## This file is part of the coreboot repair project.
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##
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## Redistribution and use in source and binary forms, with or without
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## modification, are permitted provided that the following conditions
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## are met:
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## 1. Redistributions of source code must retain the above copyright
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## notice, this list of conditions and the following disclaimer.
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## 2. Redistributions in binary form must reproduce the above copyright
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## notice, this list of conditions and the following disclaimer in the
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## documentation and/or other materials provided with the distribution.
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## 3. The name of the author may not be used to endorse or promote products
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## derived from this software without specific prior written permission.
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##
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## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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## ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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## SUCH DAMAGE.
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##
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mainmenu "Coreboot Configuration"
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menu "General setup"
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config EXPERT
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bool "Expert mode"
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help
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This allows you to select certain advanced configuration options.
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Warning: Only enable this option if you really know what you are
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doing! You have been warned!
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config LOCALVERSION
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string "Local version string"
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help
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Append an extra string to the end of the coreboot version.
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This can be useful if, for instance, you want to append the
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respective board's hostname or some other identifying string to
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the coreboot version number, so that you can easily distinguish
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boot logs of different boards from each other.
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endmenu
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source src/mainboard/Kconfig
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source src/arch/i386/Kconfig
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menu "Chipset"
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comment "CPU"
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source src/cpu/Kconfig
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comment "Northbridge"
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source src/northbridge/Kconfig
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comment "Southbridge"
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source src/southbridge/Kconfig
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comment "Super I/O"
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source src/superio/Kconfig
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comment "Devices"
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source src/devices/Kconfig
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endmenu
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config PCI_BUS_SEGN_BITS
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int
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default 0
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x0
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x0
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config CPU_ADDR_BITS
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int
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default 36
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config XIP_ROM_BASE
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hex
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default 0xfffe0000
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config XIP_ROM_SIZE
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hex
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default 0x20000
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config LB_CKS_RANGE_START
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int
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default 49
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config LB_CKS_RANGE_END
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int
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default 125
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config LB_CKS_LOC
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int
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default 126
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config LOGICAL_CPUS
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bool
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default y
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config PCI_ROM_RUN
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bool
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default n
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config HEAP_SIZE
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hex
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default 0x4000
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config COREBOOT_V2
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bool
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default y
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config COREBOOT_V4
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bool
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default y
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config DEBUG
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bool
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default n
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config USE_PRINTK_IN_CAR
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bool
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default n
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config USE_OPTION_TABLE
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bool
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default n
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config MAX_CPUS
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int
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default 1
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config MMCONF_SUPPORT_DEFAULT
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bool
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default n
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config MMCONF_SUPPORT
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bool
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default n
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config RAMTOP
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hex
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default 0x200000
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config ATI_RAGE_XL
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bool
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source src/console/Kconfig
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config HAVE_ACPI_RESUME
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bool
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default n
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config ACPI_SSDTX_NUM
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int
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default 0
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config HAVE_FALLBACK_BOOT
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bool
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default y
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config USE_FALLBACK_IMAGE
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bool
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default y
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config HAVE_FAILOVER_BOOT
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bool
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default n
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config USE_FAILOVER_IMAGE
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bool
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default n
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config HAVE_HARD_RESET
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bool
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default n
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config HAVE_INIT_TIMER
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bool
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default y
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config HAVE_MAINBOARD_RESOURCES
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bool
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default n
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config HAVE_MOVNTI
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bool
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default n
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config HAVE_OPTION_TABLE
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bool
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default y
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help
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This variable specifies whether a given board has a cmos.layout
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file containing NVRAM/CMOS bit definitions.
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It defaults to 'y' but can be changed to 'n' in mainboard/*/Kconfig.
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config PIRQ_ROUTE
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bool
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default n
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config HAVE_SMI_HANDLER
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bool
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default n
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config PCI_IO_CFG_EXT
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bool
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default n
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config IOAPIC
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bool
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default n
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# TODO: Can probably be removed once all chipsets have kconfig options for it.
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config VIDEO_MB
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int
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default 0
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config USE_WATCHDOG_ON_BOOT
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bool
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default n
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config VGA
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bool
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default n
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help
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Build board-specific VGA code.
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config GFXUMA
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bool
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default n
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help
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Enable Unified Memory Architecture for graphics.
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# TODO
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# menu "Drivers"
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#
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# endmenu
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#TODO Remove this option or make it useful.
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config HAVE_LOW_TABLES
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bool
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default y
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help
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This Option is unused in the code. Since two boards try to set it to
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'n', they may be broken. We either need to make the option useful or
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get rid of it. The broken boards are:
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asus/m2v-mx_se
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supermicro/h8dme
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config HAVE_HIGH_TABLES
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bool
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default n
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help
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This variable specifies whether a given northbridge has high table
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support.
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It is set in northbridge/*/Kconfig.
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Whether or not the high tables are actually written by coreboot is
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configurable by the user via WRITE_HIGH_TABLES.
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config HAVE_ACPI_TABLES
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bool
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help
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This variable specifies whether a given board has ACPI table support.
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It is usually set in mainboard/*/Kconfig.
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Whether or not the ACPI tables are actually generated by coreboot
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is configurable by the user via GENERATE_ACPI_TABLES.
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config HAVE_MP_TABLE
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bool
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help
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This variable specifies whether a given board has MP table support.
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It is usually set in mainboard/*/Kconfig.
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Whether or not the MP table is actually generated by coreboot
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is configurable by the user via GENERATE_MP_TABLE.
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config HAVE_PIRQ_TABLE
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bool
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help
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This variable specifies whether a given board has PIRQ table support.
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It is usually set in mainboard/*/Kconfig.
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Whether or not the PIRQ table is actually generated by coreboot
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is configurable by the user via GENERATE_PIRQ_TABLE.
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#These Options are here to avoid "undefined" warnings.
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#The actual selection and help texts are in the following menu.
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config GENERATE_ACPI_TABLES
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bool
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default HAVE_ACPI_TABLES
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config GENERATE_MP_TABLE
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bool
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default HAVE_MP_TABLE
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config GENERATE_PIRQ_TABLE
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bool
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default HAVE_PIRQ_TABLE
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config WRITE_HIGH_TABLES
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bool
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default HAVE_HIGH_TABLES
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menu "System tables"
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config WRITE_HIGH_TABLES
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bool "Write 'high' tables to avoid being overwritten in F segment"
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depends on HAVE_HIGH_TABLES
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default y
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config MULTIBOOT
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bool "Generate Multiboot tables (for GRUB2)"
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default y
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config GENERATE_ACPI_TABLES
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depends on HAVE_ACPI_TABLES
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bool "Generate ACPI tables"
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default y
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help
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Generate ACPI tables for this board.
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If unsure, say Y.
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config GENERATE_MP_TABLE
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depends on HAVE_MP_TABLE
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bool "Generate an MP table"
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default y
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help
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Generate an MP table (conforming to the Intel MultiProcessor
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specification 1.4) for this board.
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If unsure, say Y.
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config GENERATE_PIRQ_TABLE
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depends on HAVE_PIRQ_TABLE
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bool "Generate a PIRQ table"
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default y
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help
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Generate a PIRQ table for this board.
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If unsure, say Y.
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endmenu
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menu "Payload"
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choice
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prompt "Add a payload"
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default PAYLOAD_NONE
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config PAYLOAD_NONE
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bool "None"
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help
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Select this option if you want to create an "empty" coreboot
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ROM image for a certain mainboard, i.e. a coreboot ROM image
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which does not yet contain a payload.
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For such an image to be useful, you have to use 'cbfstool'
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to add a payload to the ROM image later.
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config PAYLOAD_ELF
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bool "An ELF executable payload"
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help
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Select this option if you have a payload image (an ELF file)
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which coreboot should run as soon as the basic hardware
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initialization is completed.
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You will be able to specify the location and file name of the
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payload image later.
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endchoice
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config FALLBACK_PAYLOAD_FILE
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string "Payload path and filename"
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depends on PAYLOAD_ELF
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default "payload.elf"
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help
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The path and filename of the ELF executable file to use as payload.
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# TODO: Defined if no payload? Breaks build?
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config COMPRESSED_PAYLOAD_LZMA
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bool "Use LZMA compression for payloads"
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default y
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depends on PAYLOAD_ELF
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help
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In order to reduce the size payloads take up in the ROM chip
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coreboot can compress them using the LZMA algorithm.
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config COMPRESSED_PAYLOAD_NRV2B
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bool
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default n
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endmenu
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menu "VGA BIOS"
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config VGA_BIOS
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bool "Add a VGA BIOS image"
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help
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Select this option if you have a VGA BIOS image that you would
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like to add to your ROM.
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You will be able to specify the location and file name of the
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image later.
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config FALLBACK_VGA_BIOS_FILE
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string "VGA BIOS path and filename"
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depends on VGA_BIOS
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default "vgabios.bin"
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help
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The path and filename of the file to use as VGA BIOS.
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config FALLBACK_VGA_BIOS_ID
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string "VGA device PCI IDs"
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depends on VGA_BIOS
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default "1106,3230"
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help
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The comma-separated PCI vendor and device ID that would associate
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your VGA BIOS to your video card.
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Example: 1106,3230
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In the above example 1106 is the PCI vendor ID (in hex, but without
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the "0x" prefix) and 3230 specifies the PCI device ID of the
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video card (also in hex, without "0x" prefix).
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endmenu
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menu "Debugging"
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# TODO: Better help text and detailed instructions.
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config GDB_STUB
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bool "GDB debugging support"
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default y
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help
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If enabled, you will be able to set breakpoints for gdb debugging.
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See src/arch/i386/lib/c_start.S for details.
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endmenu
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config LIFT_BSP_APIC_ID
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bool
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default n
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# These probably belong somewhere else, but they are needed somewhere.
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config AP_CODE_IN_CAR
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bool
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default n
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config USE_INIT
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bool
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default n
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config ENABLE_APIC_EXT_ID
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bool
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default n
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config WARNINGS_ARE_ERRORS
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bool
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default n
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config ID_SECTION_OFFSET
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hex
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default 0x10
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