coreboot-kgpe-d16/src/mainboard/supermicro/h8dmr_fam10
Timothy Pearson 0122afb609 cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequence
This fixes Family 15h multiple package support; the previous code
hung in CAR setup and romstage when more than one CPU package was
installed for a variety of loosely related reasons.

TEST: Booted ASUS KGPE-D16 with two Opteron 6328 processors
and several different RDIMM configurations.

Change-Id: I171197c90f72d3496a385465937b7666cbf7e308
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12020
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-11-18 17:14:48 +01:00
..
board_info.txt
cmos.layout mainboard: Remove last_boot NVRAM option 2015-11-05 02:21:52 +01:00
devicetree.cb
get_bus_conf.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
hda_verb.c azalia: fix up and clean up shrinkage of boilerplate code 2015-07-14 13:40:07 +02:00
irq_tables.c mainboard/**/irq_tables.c: Remove reference to getpir 2015-11-10 14:11:06 +01:00
Kconfig AMD Kconfig: Remove QRANK_DIMM_SUPPORT from unsupported platforms 2015-08-23 17:12:04 +00:00
Kconfig.name kconfig: automatically include mainboards 2015-04-18 08:31:08 +02:00
mb_sysconf.h tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
mptable.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
README Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
resourcemap.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
romstage.c cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequence 2015-11-18 17:14:48 +01:00


There are a number of outstanding issues:

* I'm seeing toolchain issues. I can't get this tree to compile correctly with
gcc 4.3 (32 bit) - there is an optimization issue where certain parts of the
CBFS code execute very slowly. With gcc 3.4 (32 bit) that slowness
disappears. This is probably not a problem related to this port specifically.

* setting CONFIG_DEFAULT_CONSOLE_LOGLEVEL lower than 8 simply hangs the boot
shortly after the warm reset triggered by the MCP55 code. I think this too
might be a toolchain problem (but I see it on gcc 3.4 as well as 4.3).

* during startup, the CPU cores talk through each other on serial for a
while. Again, not an issue specific to this port.

* to avoid very slow LZMA decompression I use this port with LZMA compression
disabled in CBFS. I'm not sure what's causing this particular slowness.

See also this thread: http://www.coreboot.org/pipermail/coreboot/2009-September/052107.html

Ward, 2009-09-22