coreboot-kgpe-d16/src/soc/intel
Subrata Banik 45a221de79 soc/braswell: Fix P-state table
Incorrect bus-core-ratio been used to generate P-state table

Original-Reviewed-on: https://chromium-review.googlesource.com/290681
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I4a34ec80ff3f2ed46dc074c9f8fe06756db8b357
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/12731
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-14 19:17:01 +01:00
..
baytrail ACPI: Fix IASL Warning about unused method for GBUF check 2015-12-10 16:30:50 +01:00
braswell soc/braswell: Fix P-state table 2016-01-14 19:17:01 +01:00
broadwell soc/intel/broadwell: Add back support for EHCI debug setup 2015-12-27 17:45:06 +01:00
common tree: drop last paragraph of GPL copyright header from new files 2016-01-13 20:35:40 +01:00
fsp_baytrail fsp_baytrail: Add additional PCI space above 4GB 2016-01-08 02:44:15 +01:00
skylake intel/skylake/pcr.c: error out on invalid size in pcr read/write 2016-01-14 19:15:58 +01:00