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coreboot-kgpe-d16/src/soc
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Brenton Dong c9b398191e soc/intel/apollolake: allow ApolloLake SoC to use FSP CAR Init 
FSP v2.0 Driver supports TempRamInit & TempRamExit APIs to initialize
& tear down Cache-As-Ram.  Add TempRamInit & TempRamExit usage to
ApolloLake SoC when CONFIG_FSP_CAR is enabled.

Verified on Intel Leaf Hill CRB and confirmed that Cache-As-Ram
is correctly set up and torn down using the FSP v2.0 APIs
without coreboot implementation of CAR init/teardown.

Change-Id: Ifd6fe8398ea147a5fb8c60076b93205bb94b1f25
Signed-off-by: Brenton Dong <brenton.m.dong@intel.com>
Reviewed-on: https://review.coreboot.org/17063
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-21 00:11:24 +01:00
..
broadcom/cygnus spi: Define and use spi_ctrlr structure 2016-12-05 03:29:04 +01:00
dmp/vortex86ex src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-07-31 19:27:53 +02:00
imgtec/pistachio spi: Define and use spi_ctrlr structure 2016-12-05 03:29:04 +01:00
intel soc/intel/apollolake: allow ApolloLake SoC to use FSP CAR Init 2016-12-21 00:11:24 +01:00
lowrisc/lowrisc soc/lowrisc: Place CBMEM at top of autodetected RAM 2016-12-06 18:51:13 +01:00
marvell drivers/spi: fix flash writes at page boundaries 2016-12-19 22:34:52 +01:00
mediatek/mt8173 mediatek/mt8173: Check the right set of bits in USB controller 2016-12-16 15:54:39 +01:00
nvidia spi: Define and use spi_ctrlr structure 2016-12-05 03:29:04 +01:00
qualcomm spi: Define and use spi_ctrlr structure 2016-12-05 03:29:04 +01:00
rdc/r8610 rdc/r8610: Move to src/soc 2016-05-05 20:08:58 +02:00
rockchip rockchip: rk3399: change emmc clk to 148.5MHz 2016-12-13 19:46:14 +01:00
samsung samsung/exynos5420: Fix test for src < 0 2016-12-16 15:57:56 +01:00
ucb/riscv soc/ucb/riscv: Place CBMEM at top of autodetected RAM 2016-12-06 18:48:28 +01:00