ae6a4b6d3c
In the intel/common/block * Move I2C common code from intel/common to intel/common/block. * Split the code into common, early init and post mem init stages and put it in lpss_i2c.c, i2c_early.c and i2c.c respectively. * Declare functions for getting platform specific i2c bus config and mapping bus to devfn and vice versa, that have to be implemented by SoC. In skylake/apollolake * Stop using code from soc/intel/common/lpss_i2c.c. * Remove early i2c initialization code from bootblock. * Refactor i2c.c file to implement SoC specific methods required by the I2C IP block. Change-Id: I4d91a04c22e181e3a995112cce6d5f0324130b81 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/19468 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
154 lines
4.7 KiB
Makefile
154 lines
4.7 KiB
Makefile
ifeq ($(CONFIG_SOC_INTEL_APOLLOLAKE),y)
|
|
|
|
subdirs-y += ../../../cpu/intel/microcode
|
|
subdirs-y += ../../../cpu/intel/turbo
|
|
subdirs-y += ../../../cpu/x86/lapic
|
|
subdirs-y += ../../../cpu/x86/mtrr
|
|
subdirs-y += ../../../cpu/x86/smm
|
|
subdirs-y += ../../../cpu/x86/tsc
|
|
subdirs-y += ../../../cpu/x86/cache
|
|
|
|
bootblock-y += bootblock/bootblock.c
|
|
bootblock-y += bootblock/bootblock.c
|
|
bootblock-y += car.c
|
|
bootblock-y += gpio.c
|
|
bootblock-y += heci.c
|
|
bootblock-y += i2c.c
|
|
bootblock-y += lpc_lib.c
|
|
bootblock-y += mmap_boot.c
|
|
bootblock-y += pmutil.c
|
|
bootblock-y += spi.c
|
|
bootblock-y += tsc_freq.c
|
|
bootblock-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
|
|
bootblock-$(CONFIG_FSP_CAR) += bootblock/cache_as_ram_fsp.S
|
|
|
|
romstage-y += car.c
|
|
romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c
|
|
romstage-y += gpio.c
|
|
romstage-y += heci.c
|
|
romstage-y += i2c.c
|
|
romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
|
|
romstage-y += lpc_lib.c
|
|
romstage-y += memmap.c
|
|
romstage-y += meminit.c
|
|
romstage-y += mmap_boot.c
|
|
romstage-y += tsc_freq.c
|
|
romstage-y += pmutil.c
|
|
romstage-y += reset.c
|
|
romstage-y += spi.c
|
|
|
|
smm-y += mmap_boot.c
|
|
smm-y += pmutil.c
|
|
smm-y += gpio.c
|
|
smm-y += smihandler.c
|
|
smm-y += spi.c
|
|
smm-y += tsc_freq.c
|
|
smm-y += uart_early.c
|
|
|
|
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
|
|
ramstage-y += cpu.c
|
|
ramstage-y += chip.c
|
|
ramstage-y += cse.c
|
|
ramstage-y += elog.c
|
|
ramstage-y += dsp.c
|
|
ramstage-y += gpio.c
|
|
ramstage-y += graphics.c
|
|
ramstage-y += heci.c
|
|
ramstage-y += i2c.c
|
|
ramstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
|
|
ramstage-y += lpc.c
|
|
ramstage-y += lpc_lib.c
|
|
ramstage-y += memmap.c
|
|
ramstage-y += mmap_boot.c
|
|
ramstage-y += p2sb.c
|
|
ramstage-y += uart.c
|
|
ramstage-y += nhlt.c
|
|
ramstage-y += northbridge.c
|
|
ramstage-y += spi.c
|
|
ramstage-y += tsc_freq.c
|
|
ramstage-y += pmutil.c
|
|
ramstage-y += pmc.c
|
|
ramstage-y += reset.c
|
|
ramstage-y += smi.c
|
|
ramstage-y += sram.c
|
|
ramstage-y += spi.c
|
|
ramstage-y += xdci.c
|
|
ramstage-y += sd.c
|
|
|
|
postcar-y += memmap.c
|
|
postcar-y += mmap_boot.c
|
|
postcar-y += spi.c
|
|
postcar-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
|
|
postcar-y += tsc_freq.c
|
|
|
|
postcar-$(CONFIG_FSP_CAR) += exit_car_fsp.S
|
|
|
|
verstage-y += car.c
|
|
verstage-y += i2c.c
|
|
verstage-y += heci.c
|
|
verstage-y += memmap.c
|
|
verstage-y += mmap_boot.c
|
|
verstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
|
|
verstage-y += tsc_freq.c
|
|
verstage-y += pmutil.c
|
|
verstage-y += reset.c
|
|
verstage-y += spi.c
|
|
|
|
CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include
|
|
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/apollolake
|
|
|
|
# Since FSP-M runs in CAR we need to relocate it to a specific address
|
|
$(CONFIG_FSP_M_CBFS)-options := -b $(CONFIG_FSP_M_ADDR)
|
|
|
|
ifeq ($(CONFIG_NEED_LBP2),y)
|
|
files_added::
|
|
$(CBFSTOOL) $(obj)/coreboot.rom write -r $(CONFIG_LBP2_FMAP_NAME) -f $(CONFIG_LBP2_FILE_NAME) --fill-upward
|
|
endif
|
|
|
|
# Bootblock on Apollolake platform lies in the IFWI region. In order to place
|
|
# the bootblock at the right location in IFWI image -
|
|
# a. Using ifwitool:
|
|
# 1. Create IFWI image (ifwi.bin.tmp) from input image
|
|
# (CONFIG_IFWI_FILE_NAME).
|
|
# 2. Delete OBBP sub-partition, if present.
|
|
# 3. Replace IBBL directory entry in IBBP sub-partition with currently
|
|
# generated bootblock.bin.
|
|
# b. Using cbfstool:
|
|
# 1. Write ifwi.bin.tmp to coreboot.rom using CONFIG_IFWI_FMAP_NAME.
|
|
ifeq ($(CONFIG_NEED_IFWI),y)
|
|
files_added:: $(IFWITOOL)
|
|
$(IFWITOOL) $(CONFIG_IFWI_FILE_NAME) create -f $(objcbfs)/ifwi.bin.tmp
|
|
$(IFWITOOL) $(objcbfs)/ifwi.bin.tmp delete -n OBBP
|
|
$(IFWITOOL) $(objcbfs)/ifwi.bin.tmp replace -n IBBP -f $(objcbfs)/bootblock.bin -d -e IBBL
|
|
$(CBFSTOOL) $(obj)/coreboot.rom write -r $(CONFIG_IFWI_FMAP_NAME) -f $(objcbfs)/ifwi.bin.tmp --fill-upward
|
|
endif
|
|
|
|
# DSP firmware settings files.
|
|
NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/apollolake/nhlt-blobs
|
|
DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin
|
|
DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin
|
|
DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin
|
|
MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin
|
|
DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin
|
|
|
|
cbfs-files-$(CONFIG_NHLT_DMIC_1CH_16B) += $(DMIC_1CH_48KHZ_16B)
|
|
$(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B)
|
|
$(DMIC_1CH_48KHZ_16B)-type := raw
|
|
|
|
cbfs-files-$(CONFIG_NHLT_DMIC_2CH_16B) += $(DMIC_2CH_48KHZ_16B)
|
|
$(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B)
|
|
$(DMIC_2CH_48KHZ_16B)-type := raw
|
|
|
|
cbfs-files-$(CONFIG_NHLT_DMIC_4CH_16B) += $(DMIC_4CH_48KHZ_16B)
|
|
$(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B)
|
|
$(DMIC_4CH_48KHZ_16B)-type := raw
|
|
|
|
cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER)
|
|
$(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER)
|
|
$(MAX98357_RENDER)-type := raw
|
|
|
|
cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE)
|
|
$(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE)
|
|
$(DA7219_RENDER_CAPTURE)-type := raw
|
|
|
|
endif
|