coreboot-kgpe-d16/src
Aaron Durbin 46ba4807e9 device: convert to stopwatch API
Instead of open coding the monotonic timers use the stopwatch
abstraction.

BUG=None
BRANCH=None
TEST=Booted and noted timings work as expected. Built with software_i2c
     and no compilation failures.

Change-Id: Ie5ecdd5bc764c1ab8ba4a923e65a1666aacd22f7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c7bffb5aeb41e9b88cd2c99edd6abc38f1dc90af
Original-Change-Id: I0170fe4b93d9976957a2dcb00a6ea41ddc0320ce
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/219495
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/8817
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21 17:00:40 +01:00
..
arch mips: no need in architecture specific implementation of do_printk 2015-03-21 16:57:04 +01:00
console console/Kconfig: Enable CBMEM console by default 2015-03-10 23:42:22 +01:00
cpu imgtec/danube: Add support for ImgTec Danube SoC 2015-03-21 16:57:08 +01:00
device device: convert to stopwatch API 2015-03-21 17:00:40 +01:00
drivers verstage should include the CBFS SPI wrapper, when configured 2015-03-20 16:04:52 +01:00
ec chromeec: use stopwatch API 2015-03-21 17:00:26 +01:00
include timer: add stopwatch construct 2015-03-21 17:00:17 +01:00
lib ramstage: remove rela_time use 2015-03-21 17:00:34 +01:00
mainboard mainboards/amd/fam10: Add romstage timestamps 2015-03-21 08:06:44 +01:00
northbridge cpu/amd/model_10xxx: Add support for early cbmem 2015-03-19 08:28:43 +01:00
soc danube: prepare SOC directory for urara 2015-03-21 16:57:17 +01:00
southbridge CBMEM: Add LATE_CBMEM_INIT guards 2015-03-19 06:17:07 +01:00
superio superio: ite8772f: Exit extemp busy state 2015-03-21 08:44:28 +01:00
vendorcode loaders: add program_loading.h header file 2015-03-20 19:25:29 +01:00
Kconfig arch/mips: Add base MIPS architecture support 2015-03-21 16:56:59 +01:00