593124d520
Change-Id: Ia3de79c7d71049da00ed108829eac6cb49ff3ed6 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41205 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
113 lines
2.3 KiB
C
113 lines
2.3 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copied from Linux drivers/gpu/drm/ast/ast_mode.c
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*/
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#include <delay.h>
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#include <device/i2c_simple.h>
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#include "ast_drv.h"
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static struct ast_private *ast;
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#define _GET_INDEX_REG(x) ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, (x))
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#define ASPEED_BUS 0
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static int get_clock(unsigned int bus)
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{
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uint32_t val, val2, count, pass;
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count = 0;
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pass = 0;
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val = (_GET_INDEX_REG(0x10) >> 4) & 0x01;
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do {
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val2 = (_GET_INDEX_REG(0x10) >> 4) & 0x01;
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if (val == val2) {
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pass++;
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} else {
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pass = 0;
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val = (_GET_INDEX_REG(0x10) >> 4) & 0x01;
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}
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} while ((pass < 5) && (count++ < 0x10000));
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return val & 1 ? 1 : 0;
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}
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static int get_data(unsigned int bus)
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{
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uint32_t val, val2, count, pass;
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count = 0;
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pass = 0;
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val = (_GET_INDEX_REG(0x20) >> 5) & 0x01;
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do {
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val2 = (_GET_INDEX_REG(0x20) >> 5) & 0x01;
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if (val == val2) {
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pass++;
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} else {
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pass = 0;
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val = (_GET_INDEX_REG(0x20) >> 5) & 0x01;
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}
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} while ((pass < 5) && (count++ < 0x10000));
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return val & 1 ? 1 : 0;
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}
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static void set_clock(unsigned int bus, int clock)
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{
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int i;
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u8 ujcrb7, jtemp;
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for (i = 0; i < 0x10000; i++) {
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ujcrb7 = ((clock & 0x01) ? 0 : 1);
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ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf4, ujcrb7);
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jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);
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if (ujcrb7 == jtemp)
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break;
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}
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}
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static void set_data(unsigned int bus, int data)
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{
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int i;
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u8 ujcrb7, jtemp;
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for (i = 0; i < 0x10000; i++) {
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ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
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ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf1, ujcrb7);
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jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);
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if (ujcrb7 == jtemp)
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break;
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}
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}
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static struct software_i2c_ops ast_ops = {
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.set_sda = set_data,
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.set_scl = set_clock,
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.get_sda = get_data,
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.get_scl = get_clock,
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};
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int ast_software_i2c_read(struct ast_private *ast_priv, uint8_t edid[128])
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{
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struct software_i2c_ops *backup;
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int ret;
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backup = software_i2c[ASPEED_BUS];
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software_i2c[ASPEED_BUS] = &ast_ops;
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ast = ast_priv;
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/* Ast POST pulled SDA and SCL low, recover the bus to a known state */
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set_clock(ASPEED_BUS, 1);
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set_data(ASPEED_BUS, 1);
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udelay(100);
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/* Need to reset internal EEPROM counter to 0 */
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ret = i2c_read_bytes(ASPEED_BUS, 0x50, 0, edid, 128);
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software_i2c[ASPEED_BUS] = backup;
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return ret;
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}
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