Nicola Corna e134db2535 mb/sapphire/pureplatinumh61: Use custom SPI OPMENU ... The SPI chip in this board needs a custom OPMENU, otherwise flashrom fails halfway during the write. From the default OPMENU, Block Erase (0xd8) has been replaced by AAI write (0xad) and Fast Read (0x0b) by Write Disable (0x04). Change-Id: Ie18ee4e32511482dab747c9ffeac60d3994df320 Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/25551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2018-05-02 14:14:50 +00:00
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pureplatinumh61	mb/sapphire/pureplatinumh61: Use custom SPI OPMENU	2018-05-02 14:14:50 +00:00
Kconfig
Kconfig.name