f812c44f00
The Braswell CPU seems to have two different Video BIOS roms, one for the C0 revision, and one for other revisions. Build them both into the coreboot image, and let coreboot sort out which one should be used at runtime. This should allow one rom to be used for all revisions. The initial reason for this patch was that the Kconfig symbol C0_DISP_SUPPORT didn't exist, and was causing issues. This seems like the best way to eliminate the need for that symbol. Change-Id: I5b9f225c0daf4e02fda75daf9cd07bb160bf0e0f Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12826 Tested-by: build bot (Jenkins) Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
72 lines
1.9 KiB
Makefile
72 lines
1.9 KiB
Makefile
ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
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subdirs-y += romstage
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/smm
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subdirs-y += ../../../cpu/x86/tsc
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subdirs-y += ../../../cpu/intel/microcode
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subdirs-y += ../../../cpu/intel/turbo
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romstage-y += gpio_support.c
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romstage-y += iosf.c
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romstage-y += lpc_init.c
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romstage-y += memmap.c
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romstage-y += tsc_freq.c
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ramstage-y += acpi.c
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ramstage-y += chip.c
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ramstage-y += cpu.c
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ramstage-$(CONFIG_ELOG) += elog.c
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ramstage-y += emmc.c
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ramstage-y += gpio.c
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ifeq ($(CONFIG_GOP_SUPPORT),n)
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ramstage-y += gfx.c
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endif
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ramstage-y += hda.c
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ramstage-y += iosf.c
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ramstage-y += lpe.c
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ramstage-y += lpss.c
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ramstage-y += memmap.c
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ramstage-y += northcluster.c
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ramstage-y += pcie.c
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ramstage-y += pmutil.c
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ramstage-y += ramstage.c
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ramstage-y += sata.c
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ramstage-y += scc.c
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ramstage-y += sd.c
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ramstage-y += smm.c
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ramstage-y += southcluster.c
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ramstage-y += spi.c
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ramstage-$(CONFIG_ALT_CBFS_LOAD_PAYLOAD) += spi_loading.c
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ramstage-y += tsc_freq.c
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# Remove as ramstage gets fleshed out
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ramstage-y += placeholders.c
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smm-y += lpc_init.c
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smm-y += pmutil.c
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smm-y += smihandler.c
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smm-y += spi.c
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smm-y += tsc_freq.c
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# cpu_microcode_bins += ???
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CPPFLAGS_common += -I$(src)/soc/intel/braswell/
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CPPFLAGS_common += -I$(src)/soc/intel/braswell/include
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CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/braswell
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CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR)
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ifneq ($(CONFIG_GOP_SUPPORT),y)
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ifneq ($(CONFIG_VGA_BIOS_FILE),)
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#we will assume that the vbios names will remain as they are now: vgabios.bin and vgabios_c0.bin
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BRASWELL_C0_VBIOS= $(subst .bin,_c0.bin,$(call strip_quotes,$(CONFIG_VGA_BIOS_FILE)))
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cbfs-files-$(CONFIG_VGA_BIOS) += pci8086,22b1.rom
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pci8086,22b1.rom-file := $(BRASWELL_C0_VBIOS)
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pci8086,22b1.rom-type := optionrom
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endif # ifneq ($(CONFIG_GOP_SUPPORT),y)
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endif # ifneq ($(CONFIG_VGA_BIOS_FILE),)
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endif # ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
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