03abf8dbd1
This patch ensures all IA chipsets and common Kconfig files are getting included without specifying dedicated chipset names. TEST=Able to compile CML and TGL RVP. Change-Id: Ic2d8a8ac1c4acfabd4ded1bfd4ff359e820e174b Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39530 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
71 lines
1.5 KiB
Text
71 lines
1.5 KiB
Text
config SOC_INTEL_COMMON
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bool
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select HAVE_DISPLAY_MTRRS
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help
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common code for Intel SOCs
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if SOC_INTEL_COMMON
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comment "Intel SoC Common Code"
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source "src/soc/intel/common/block/Kconfig"
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comment "Intel SoC Common PCH Code"
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source "src/soc/intel/common/pch/Kconfig"
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comment "Intel SoC Common coreboot stages"
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source "src/soc/intel/common/basecode/Kconfig"
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config SOC_INTEL_COMMON_RESET
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bool
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default n
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select HAVE_CF9_RESET
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config SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
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bool
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default n
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config ACPI_CONSOLE
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bool
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default n
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help
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Provide a mechanism for serial console based ACPI debug.
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config MMA
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bool "Enable MMA (Memory Margin Analysis) support for Intel Core"
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default n
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depends on SOC_INTEL_KABYLAKE || SOC_INTEL_SKYLAKE
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help
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Set this option to y to enable MMA (Memory Margin Analysis) support
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config MMA_BLOBS_PATH
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string "Path to MMA blobs"
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depends on MMA
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default "3rdparty/blobs/soc/intel/kabylake/mma-blobs" if SOC_INTEL_KABYLAKE
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default "3rdparty/blobs/soc/intel/skylake/mma-blobs" if SOC_INTEL_SKYLAKE
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config SOC_INTEL_COMMON_ACPI
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bool
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default n
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config SOC_INTEL_COMMON_NHLT
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bool
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default n
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config TPM_TIS_ACPI_INTERRUPT
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int
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help
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acpi_get_gpe() is used to provide interrupt status to TPM layer.
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This option specifies the GPE number.
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config SOC_INTEL_DEBUG_CONSENT
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bool "Enable SOC debug interface"
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default n
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help
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Set this option to enable default debug interface of SoC such as DBC
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or DCI.
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config SMM_MODULE_STACK_SIZE
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hex
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default 0x800
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endif # SOC_INTEL_COMMON
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