d53d96dddd
This driver is only a thin shell for uart8250mem and we could extend it with further compatible PCI IDs from other vendors/brands. Change-Id: Ic115b1baa0be0dbaa81e4a17a2e466019d3f4a67 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5329 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
73 lines
2.2 KiB
C
73 lines
2.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Google Inc
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/device.h>
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#include <device/pci_def.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <console/console.h>
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#include <console/uart.h>
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#include <arch/io.h>
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static void oxford_oxpcie_enable(device_t dev)
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{
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printk(BIOS_DEBUG, "Initializing Oxford OXPCIe952\n");
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struct resource *res = find_resource(dev, 0x10);
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if (!res) {
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printk(BIOS_WARNING, "OXPCIe952: No UART resource found.\n");
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return;
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}
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printk(BIOS_DEBUG, "OXPCIe952: Class=%x Revision ID=%x\n",
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(read32(res->base) >> 8), (read32(res->base) & 0xff));
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printk(BIOS_DEBUG, "OXPCIe952: %d UARTs detected.\n",
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(read32(res->base + 4) & 3));
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printk(BIOS_DEBUG, "OXPCIe952: UART BAR: 0x%x\n", (u32)res->base);
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}
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static void oxford_oxpcie_set_resources(struct device *dev)
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{
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pci_dev_set_resources(dev);
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/* Re-initialize OXPCIe base address after set_resources */
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u32 mmio_base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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oxford_remap(mmio_base & ~0xf);
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}
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static struct device_operations oxford_oxpcie_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = oxford_oxpcie_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = oxford_oxpcie_enable,
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.scan_bus = 0,
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};
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static const struct pci_driver oxford_oxpcie_driver __pci_driver = {
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.ops = &oxford_oxpcie_ops,
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.vendor = 0x1415,
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.device = 0xc158,
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};
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static const struct pci_driver oxford_oxpcie_driver_2 __pci_driver = {
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.ops = &oxford_oxpcie_ops,
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.vendor = 0x1415,
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.device = 0xc11b,
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};
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