coreboot-kgpe-d16/src
Raul E Rangel 48c99db6d6 mb/amd/majolica: Add FCH IRQ routing
I left most everything as NC since we don't expose the values to the
OS yet.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I7c3195ef27091f1bc61892c475ffe09137b63083
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50511
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-12 20:43:09 +00:00
..
acpi ACPI: Move PICM declaration 2021-02-11 16:37:28 +00:00
arch arch/x86/id.S: Remove unneeded whitespace before tab 2021-02-11 10:22:07 +00:00
commonlib acpi: Add support for reporting CrashLog in BERT table 2021-02-04 10:21:02 +00:00
console lib/trace: Remove TRACE support 2020-12-02 23:35:58 +00:00
cpu cpu/intel/haswell/acpi.c: Correct get_cores_per_package 2021-02-12 19:29:07 +00:00
device device/azalia_device: Add mainboard hook to program codecs 2021-02-10 07:21:11 +00:00
drivers src: Remove unused <boot_device.h> 2021-02-10 07:22:08 +00:00
ec src/ec/quanta/ene_kb3940q/acpi/battery.asl: Convert to ASL 2.0 2021-02-10 19:18:09 +00:00
include cpu/intel/microcode: Fix typo in function parameter 2021-02-11 10:19:04 +00:00
lib lib/selfboot.c: Fix indentation and drop one newline 2021-02-11 10:19:17 +00:00
mainboard mb/amd/majolica: Add FCH IRQ routing 2021-02-12 20:43:09 +00:00
northbridge nb/intel/haswell/pei_data.h: Define SPD_LEN 2021-02-12 19:49:16 +00:00
security security/intel/txt/Makefile.inc: Use tab for indent 2021-02-11 10:23:04 +00:00
soc soc/amd/cezanne: Add PCI IRQ Router definitions 2021-02-12 20:42:35 +00:00
southbridge sb/intel/x/lpc.c: Drop commented-out gpio_init call 2021-02-12 07:56:57 +00:00
superio src/superio: Fix typo in comment 2021-02-11 10:21:54 +00:00
vendorcode vc/amd/fsp/cezanne: add FspGuids.h 2021-02-09 19:13:29 +00:00
Kconfig nb/intel/gm45: Factor out {DMI,EP,MCH}BAR accessors 2021-02-07 20:20:00 +00:00