0ee0d92978
BRANCH=none BUG=chrome-os-partner:31936 TEST=build and test on ryu Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Change-Id: Ia10bf7ae3bde389e883970f9a6ee931c32b8172b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f26902364b6a453adb850abfb0c4ce9686e99b5d Original-Change-Id: I68b92608098959cca14324bfc7e1e58389205989 Original-Reviewed-on: https://chromium-review.googlesource.com/226905 Original-Tested-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9514 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
73 lines
2 KiB
C
73 lines
2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
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#define __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
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#include <gpio.h>
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#include <base3.h>
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/* Board ID definitions. */
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enum {
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BOARD_REV0 = BASE3(0, 0),
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BOARD_REV1 = BASE3(0, 1),
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BOARD_REV2 = BASE3(0, Z),
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BOARD_REV3 = BASE3(1, 0),
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BOARD_REV4 = BASE3(1, 1),
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BOARD_REV5 = BASE3(1, Z),
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BOARD_REV6 = BASE3(Z, 0),
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BOARD_REV7 = BASE3(Z, 1),
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BOARD_REV8 = BASE3(Z, Z),
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BOARD_ID_PROTO_0 = BOARD_REV0,
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BOARD_ID_PROTO_1 = BOARD_REV1,
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BOARD_ID_PROTO_3 = BOARD_REV2,
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BOARD_ID_EVT = BOARD_REV3,
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BOARD_ID_DVT = BOARD_REV4,
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BOARD_ID_PVT = BOARD_REV5,
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BOARD_ID_MP = BOARD_REV6,
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};
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enum {
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/* Board ID related GPIOS. */
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BD_ID0 = GPIO(Q3),
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BD_ID1 = GPIO(Q4),
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/* LTE modem related GPIOs */
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MODEM_RESET = GPIO(S3),
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MODEM_PWR_ON = GPIO(S4),
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MDM_DET = GPIO(V1),
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/* Warm reset */
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AP_SYS_RESET_L = GPIO(I5),
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/* Write Protect */
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SPI_1V8_WP_L = GPIO(R1),
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WRITE_PROTECT_L = SPI_1V8_WP_L,
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WRITE_PROTECT_L_INDEX = GPIO_R1_INDEX,
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/* Power button - Depending on board id, maybe active high / low */
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BTN_AP_PWR = GPIO(Q0),
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POWER_BUTTON = BTN_AP_PWR,
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POWER_BUTTON_INDEX = GPIO_Q0_INDEX,
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/* Panel related GPIOs */
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LCD_EN = GPIO(H5),
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LCD_RST_L = GPIO(H3),
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EN_VDD18_LCD = GPIO(X0),
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EN_VDD_LCD = GPIO(BB6), /* P1/P3 board */
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};
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#endif /* __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__ */
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