ed08bcc12d
This unplugs Stefan's PIANO project. Change Tianocore payload configuration to use corebootPkg. As argument you have to give it the COREBOOT.FD generated by the Tianocore build system. It automatically determines base address and entry point. Compression setting is honored (ie. no compression if you don't want), but corebootPkg currently assumes that coreboot is doing it. Loading a 6MB payload into CBFS without compression will fail more often than not. Change-Id: If9c64c9adb4a846a677c8af40f149ce697059ee6 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/2280 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
426 lines
17 KiB
Makefile
426 lines
17 KiB
Makefile
################################################################################
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
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## Copyright (C) 2009-2010 coresystems GmbH
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## Copyright (C) 2009 Ronald G. Minnich
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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################################################################################
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# Take care of subdirectories
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subdirs-y += boot
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# subdirs-y += init
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subdirs-y += lib
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subdirs-y += smp
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OPTION_TABLE_H:=
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ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
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cbfs-files-y += cmos_layout.bin
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cmos_layout.bin-file = $(obj)/cmos_layout.bin
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cmos_layout.bin-type = 0x01aa
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OPTION_TABLE_H:=$(obj)/option_table.h
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endif
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################################################################################
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# Build the final rom image
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COREBOOT_ROM_DEPENDENCIES:=
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ifeq ($(CONFIG_PAYLOAD_ELF),y)
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COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
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endif
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ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
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COREBOOT_ROM_DEPENDENCIES+=seabios
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endif
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ifeq ($(CONFIG_PAYLOAD_FILO),y)
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COREBOOT_ROM_DEPENDENCIES+=filo
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endif
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ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
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COREBOOT_ROM_DEPENDENCIES+=$(objcbfs)/coreboot_ap.elf
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endif
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extract_nth=$(word $(1), $(subst |, ,$(2)))
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ifneq ($(CONFIG_UPDATE_IMAGE),y)
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prebuild-files = \
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$(foreach file,$(cbfs-files), \
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$(CBFSTOOL) $@.tmp \
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add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \
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-f $(call extract_nth,1,$(file)) \
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-n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \
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$(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&)
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prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
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$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL)
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$(CBFSTOOL) $@.tmp create -m x86 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
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-B $(objcbfs)/bootblock.bin -a 64 \
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-o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) ))
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$(prebuild-files) true
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mv $@.tmp $@
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else
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.PHONY: $(obj)/coreboot.pre1
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$(obj)/coreboot.pre1: $(CBFSTOOL)
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mv $(obj)/coreboot.rom $@
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endif
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$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE)
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@printf " CBFS $(subst $(obj)/,,$(@))\n"
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cp $(obj)/coreboot.pre $@.tmp
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if [ -f $(objcbfs)/coreboot_ap.elf ]; \
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then \
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$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/coreboot_ap.elf -n $(CONFIG_CBFS_PREFIX)/coreboot_ap -c $(CBFS_COMPRESS_FLAG); \
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fi
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$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/coreboot_ram.elf -n $(CONFIG_CBFS_PREFIX)/coreboot_ram -c $(CBFS_COMPRESS_FLAG)
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ifeq ($(CONFIG_PAYLOAD_NONE),y)
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@printf " PAYLOAD none (as specified by user)\n"
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endif
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ifeq ($(CONFIG_PAYLOAD_ELF),y)
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@printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
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$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
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endif
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ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
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@printf " PAYLOAD SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
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$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
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endif
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ifeq ($(CONFIG_PAYLOAD_FILO),y)
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@printf " PAYLOAD FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
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$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
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endif
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ifeq ($(CONFIG_PAYLOAD_TIANOCORE),y)
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@printf " PAYLOAD Tiano Core (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
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$(eval $(shell \
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TMPFILE=`mktemp`; \
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head -c1200 $(CONFIG_TIANOCORE_FILE) | \
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tail -c1100 > $$TMPFILE && \
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LC_ALL=C objdump -x $$TMPFILE | \
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grep .text | while read idx nam size vma lma off align; do \
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printf "TIANO_ENTRY:=%d " 0x$$vma; \
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expr `printf "%d - %d - 100" 0x$$vma 0x$$off`; \
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done && \
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rm $$TMPFILE))
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$(eval TIANO_BASE:=$(word 2,$(TIANO_ENTRY)))
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$(eval TIANO_ENTRY:=$(word 1,$(TIANO_ENTRY)))
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$(CBFSTOOL) $@.tmp add-flat-binary -f $(CONFIG_TIANOCORE_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -l $(TIANO_BASE) -e $(TIANO_ENTRY) -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
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endif
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ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
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@printf " CONFIG $(DOTCONFIG)\n"
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if [ -f $(DOTCONFIG) ]; then \
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echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \
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sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
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$(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi
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endif
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mv $@.tmp $@
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@printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n"
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$(CBFSTOOL) $@ print
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stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID))
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cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom
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pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))
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pci$(stripped_vgabios_id).rom-type := optionrom
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cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin
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mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE))
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mbi.bin-type := mbi
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cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
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bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
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bootsplash.jpg-type := bootsplash
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################################################################################
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# i386 specific tools
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NVRAMTOOL:=$(objutil)/nvramtool/nvramtool
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$(OPTION_TABLE_H): $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
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@printf " OPTION $(subst $(obj)/,,$(@))\n"
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$(NVRAMTOOL) -y $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout -H $@
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$(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
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@printf " OPTION $(subst $(obj)/,,$(@))\n"
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$(NVRAMTOOL) -y $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout -L $@
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################################################################################
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# Common recipes for all stages
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$(objcbfs)/%.bin: $(objcbfs)/%.elf
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@printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
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$(OBJCOPY) -O binary $< $@
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$(objcbfs)/%.elf: $(objcbfs)/%.debug
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@printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
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cp $< $@.tmp
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$(NM) -n $@.tmp | sort > $(basename $@).map
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$(OBJCOPY) --strip-debug $@.tmp
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$(OBJCOPY) --add-gnu-debuglink=$< $@.tmp
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mv $@.tmp $@
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################################################################################
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# Build the coreboot_ram (stage 2)
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$(objcbfs)/coreboot_ram.debug: $(objgenerated)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld
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@printf " CC $(subst $(obj)/,,$(@))\n"
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ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
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$(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/coreboot_ram.ld
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else
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $<
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endif
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$(objgenerated)/coreboot_ram.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
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$(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group
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else
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$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
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endif
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################################################################################
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# Ramstage for AP CPU (AMD K8, obsolete?)
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$(objcbfs)/coreboot_ap.debug: $(objgenerated)/coreboot_ap.o $(src)/arch/x86/init/ldscript_apc.lb
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $<
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$(objgenerated)/coreboot_ap.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
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################################################################################
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# done
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crt0s = $(src)/arch/x86/init/prologue.inc
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ldscripts =
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ldscripts += $(src)/arch/x86/init/romstage.ld
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crt0s += $(src)/cpu/x86/32bit/entry32.inc
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ldscripts += $(src)/cpu/x86/32bit/entry32.lds
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crt0s += $(src)/cpu/x86/fpu_enable.inc
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ifeq ($(CONFIG_SSE),y)
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crt0s += $(src)/cpu/x86/sse_enable.inc
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endif
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crt0s += $(cpu_incs)
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crt0s += $(cpu_incs-y)
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ifeq ($(CONFIG_LLSHELL),y)
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crt0s += $(src)/arch/x86/llshell/llshell.inc
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endif
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crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
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ifeq ($(CONFIG_ROMCC),y)
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crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
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endif
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ifeq ($(CONFIG_ROMCC),y)
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ROMCCFLAGS ?= -mcpu=p2 -O2
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$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
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printf " ROMCC romstage.inc\n"
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$(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
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else
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$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
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@printf " CC romstage.inc\n"
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$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
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$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
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@printf " POST romstage.inc\n"
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sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \
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-e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp
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mv $@.tmp $@
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endif
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# Things that appear in every board
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romstage-srcs += $(objgenerated)/crt0.s
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ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
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ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
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ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
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endif
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endif
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ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
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endif
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ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/reset.c),)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
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endif
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ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
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ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt2.asl),)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
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endif
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ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt3.asl),)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
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endif
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ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt4.asl),)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
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endif
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ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt5.asl),)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
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endif
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ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/fadt.c),)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
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endif
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endif
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ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
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ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/smihandler.c),)
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smm-srcs += src/mainboard/$(MAINBOARDDIR)/smihandler.c
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endif
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endif
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ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c),)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
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endif
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################################################################################
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# Build the final rom image
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$(obj)/coreboot.pre: $(objcbfs)/romstage_xip.elf $(obj)/coreboot.pre1 $(CBFSTOOL)
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@printf " CBFS $(subst $(obj)/,,$(@))\n"
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cp $(obj)/coreboot.pre1 $@.tmp
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$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/romstage_xip.elf \
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-n $(CONFIG_CBFS_PREFIX)/romstage -c none \
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-b $(shell cat $(objcbfs)/base_xip.txt)
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mv $@.tmp $@
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################################################################################
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# Build the bootblock
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bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
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bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
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bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
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bootblock_lds += $(src)/arch/x86/lib/id.lds
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bootblock_lds += $(chipset_bootblock_lds)
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bootblock_inc = $(src)/arch/x86/init/prologue.inc
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bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
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bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
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bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
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bootblock_inc += $(src)/arch/x86/lib/id.inc
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bootblock_inc += $(chipset_bootblock_inc)
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ifeq ($(CONFIG_SSE),y)
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bootblock_inc += $(src)/cpu/x86/sse_enable.inc
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endif
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bootblock_inc += $(objgenerated)/bootblock.inc
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bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
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bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
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ifeq ($(CONFIG_SSE),y)
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bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__
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endif
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$(objgenerated)/bootblock.ld: $$(bootblock_lds) $(obj)/ldoptions
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@printf " GEN $(subst $(obj)/,,$(@))\n"
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printf '$(foreach ldscript,ldoptions $(bootblock_lds),INCLUDE "$(ldscript)"\n)' > $@
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$(objgenerated)/bootblock_inc.S: $$(bootblock_inc)
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@printf " GEN $(subst $(obj)/,,$(@))\n"
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printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@
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$(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -Wa,-acdlns -c -o $@ $< > $(basename $@).disasm
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$(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
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$(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
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@printf " ROMCC $(subst $(obj)/,,$(@))\n"
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$(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \
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$< > $(objgenerated)/bootblock.inc.d
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$(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) $< -o $@
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$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
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$(LD) -m elf_i386 -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld
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else
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $<
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endif
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################################################################################
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# Build the romstage
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$(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.ld
|
|
@printf " LINK $(subst $(obj)/,,$(@))\n"
|
|
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
|
|
$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage_null.ld
|
|
else
|
|
$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld $(romstage-objs)
|
|
endif
|
|
$(NM) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \
|
|
echo "Forbidden global variables in romstage:"; \
|
|
$(NM) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \
|
|
else true; fi
|
|
|
|
$(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld
|
|
@printf " LINK $(subst $(obj)/,,$(@))\n"
|
|
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
|
|
$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage_xip.ld
|
|
else
|
|
$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld $(romstage-objs)
|
|
endif
|
|
|
|
$(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions
|
|
@printf " GEN $(subst $(obj)/,,$(@))\n"
|
|
rm -f $@
|
|
printf "ROMSTAGE_BASE = 0x0;\n" > $@.tmp
|
|
printf '$(foreach ldscript,ldoptions $(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' >> $@.tmp
|
|
mv $@.tmp $@
|
|
|
|
$(objgenerated)/romstage_xip.ld: $(objgenerated)/romstage_null.ld $(objcbfs)/base_xip.txt
|
|
@printf " GEN $(subst $(obj)/,,$(@))\n"
|
|
rm -f $@
|
|
sed -e 's/^/ROMSTAGE_BASE = /g' -e 's/$$/;/g' $(objcbfs)/base_xip.txt > $@.tmp
|
|
sed -e '/ROMSTAGE_BASE/d' $(objgenerated)/romstage_null.ld >> $@.tmp
|
|
mv $@.tmp $@
|
|
|
|
$(objcbfs)/base_xip.txt: $(obj)/coreboot.pre1 $(objcbfs)/romstage_null.bin
|
|
rm -f $@
|
|
$(CBFSTOOL) $(obj)/coreboot.pre1 locate -f $(objcbfs)/romstage_null.bin -n $(CONFIG_CBFS_PREFIX)/romstage -a $(CONFIG_XIP_ROM_SIZE) > $@.tmp \
|
|
|| { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; }
|
|
mv $@.tmp $@
|
|
|
|
$(objgenerated)/crt0.romstage.S: $$(crt0s)
|
|
@printf " GEN $(subst $(obj)/,,$(@))\n"
|
|
printf '$(foreach crt0,$(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@
|
|
|
|
$(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s
|
|
@printf " CC $(subst $(obj)/,,$(@))\n"
|
|
$(CC) -Wa,-acdlns -c -o $@ $< > $(basename $@).disasm
|
|
|
|
$(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h
|
|
@printf " CC $(subst $(obj)/,,$(@))\n"
|
|
$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
|
|
|
|
seabios:
|
|
$(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
|
|
HOSTCC="$(HOSTCC)" \
|
|
CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
|
|
OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
|
|
CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \
|
|
CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \
|
|
OUT=$(abspath $(obj)) IASL="$(IASL)"
|
|
|
|
filo:
|
|
$(MAKE) -C payloads/external/FILO -f Makefile.inc \
|
|
HOSTCC="$(HOSTCC)" \
|
|
CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
|
|
OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
|
|
CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \
|
|
CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE)
|
|
|