Angel Pons 4b3dbbaa4b mb/aopen/dxplplusu: Drop dead code ... This code is not even being build-tested. Drop it before it grows moss. Change-Id: I3f9b31a2bfb85ceb9ff833c076e062291c944923 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43242 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner		2020-07-09 23:48:14 +00:00
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acpi	acpigen: Add acpigen_notify	2020-07-07 20:31:22 +00:00
arch	arch/arm/include/smp/spinlock.h: Drop dead code	2020-07-09 21:37:17 +00:00
commonlib	lib/coreboot_table: Add Intel FSP version to coreboot table	2020-07-04 11:20:08 +00:00
console	console: Update for vboot before bootblock	2020-06-15 22:07:12 +00:00
cpu	cpu/intel/model_2065x/model_2065x_init.c: Drop dead code	2020-07-09 23:44:04 +00:00
device	device/pci_device.c: Drop dead code	2020-07-09 23:44:44 +00:00
drivers	drivers/pc80/pc/i8259c: Drop dead code	2020-07-09 23:45:08 +00:00
ec	ec/google: Add function ec_fill_dptf_helpers()	2020-07-07 20:31:30 +00:00
include	include/cpu/amd/msr: move SMM_LOCK bit right after HWCR_MSR definition	2020-07-09 23:19:31 +00:00
lib	lib: Temporarily remove timestamps from psp_verstage	2020-07-08 19:37:50 +00:00
mainboard	mb/aopen/dxplplusu: Drop dead code	2020-07-09 23:48:14 +00:00
northbridge	nb/intel/ironlake/raminit.c: Drop dead code	2020-07-09 23:47:13 +00:00
security	security/vboot/secdata_tpm.c: Drop dead code	2020-07-09 21:29:27 +00:00
soc	include/cpu/amd/msr: move SMM_LOCK bit right after HWCR_MSR definition	2020-07-09 23:19:31 +00:00
southbridge	sb/intel/lynxpoint/me_9.x.c: Drop dead code	2020-07-09 23:46:49 +00:00
superio	superio/winbond/w83977tf: Add suspend related fields	2020-06-16 20:17:26 +00:00
vendorcode	vc/amd/fsp/picasso: add comment on logical lane numbers in descriptor	2020-07-09 23:20:04 +00:00
Kconfig	arch/x86: Remove RELOCATABLE_RAMSTAGE	2020-07-06 06:17:47 +00:00