14e2277962
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
68 lines
1.5 KiB
C
68 lines
1.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2004 Eric W. Biederman
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef CPU_X86_CACHE
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#define CPU_X86_CACHE
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static inline unsigned long read_cr0(void)
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{
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unsigned long cr0;
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asm volatile ("movl %%cr0, %0" : "=r" (cr0));
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return cr0;
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}
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static inline void write_cr0(unsigned long cr0)
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{
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asm volatile ("movl %0, %%cr0" : : "r" (cr0));
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}
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static inline void invd(void)
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{
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asm volatile("invd" ::: "memory");
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}
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static inline void wbinvd(void)
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{
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asm volatile ("wbinvd");
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}
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static inline void enable_cache(void)
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{
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unsigned long cr0;
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cr0 = read_cr0();
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cr0 &= 0x9fffffff;
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write_cr0(cr0);
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}
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static inline void disable_cache(void)
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{
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/* Disable and write back the cache */
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unsigned long cr0;
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cr0 = read_cr0();
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cr0 |= 0x40000000;
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wbinvd();
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write_cr0(cr0);
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wbinvd();
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}
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#if !defined(__PRE_RAM__)
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void x86_enable_cache(void);
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#endif
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#endif /* CPU_X86_CACHE */
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