coreboot-kgpe-d16/src/northbridge/intel/x4x
Arthur Heymans 4bc9c28811 nb/intel/x4x/Kconfig: Don't fix CBFS_SIZE on i82801gx southbridge
The x4x northbridge can be paired with either an ICH7 (in the case of
g41) or an ICH10 (all other cases: g45, q45, p45, ...). Only ICH10
sometimes occurs with a descriptor, gbe and an ME region.

ICH7 is always descriptorless so it makes no sense to fix CBFS to
accommodate for those other objects.

Change-Id: I4a01dfdbce1807e44932a3ac812110382332abd8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19181
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-04-15 20:08:08 +02:00
..
acpi nb/intel/x4x: Correct typos in interrupt routing for PEG 2016-09-07 19:06:42 +02:00
acpi.c nb/intel/x4x: Fix issues found by checkpatch.pl 2017-03-21 20:11:15 +01:00
bootblock.c nb/intel/x4x: Fix issues found by checkpatch.pl 2017-03-21 20:11:15 +01:00
chip.h
early_init.c nb/intel/x4x: Fix issues found by checkpatch.pl 2017-03-21 20:11:15 +01:00
gma.c nb/intel/x4x: Fix issues found by checkpatch.pl 2017-03-21 20:11:15 +01:00
iomap.h nb/intel/x4x: Fix issues found by checkpatch.pl 2017-03-21 20:11:15 +01:00
Kconfig nb/intel/x4x/Kconfig: Don't fix CBFS_SIZE on i82801gx southbridge 2017-04-15 20:08:08 +02:00
Makefile.inc nb/intel/x4x: Implement resume from S3 suspend 2017-02-17 23:44:36 +01:00
northbridge.c nb/intel/x4x: Fix issues found by checkpatch.pl 2017-03-21 20:11:15 +01:00
ram_calc.c nb/intel/x4x: Fix issues found by checkpatch.pl 2017-03-21 20:11:15 +01:00
raminit.c nb/x4x: Move checkreset before SPD reading 2017-03-21 20:12:07 +01:00
raminit_ddr2.c nb/x4x: Move checkreset before SPD reading 2017-03-21 20:12:07 +01:00
x4x.h nb/intel/x4x: Fix issues found by checkpatch.pl 2017-03-21 20:11:15 +01:00