ccdd20a539
this patch also slightly changes it so we have a single cache_as_ram.inc which requires no "help" from cache_as_ram_post.c and cache_as_ram_disable.c (or worse, a lot of cruft hacked right into romstage.c like on tyan s2735) Now all CAR code except the AMD Opteron/Athlon64 CAR code follows the new simpler scheme. I'll gladly leave src/cpu/amd/car to someone else ;-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5423 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 |
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.. | ||
boot | ||
include | ||
init | ||
lib | ||
llshell | ||
smp | ||
coreboot_ram.ld | ||
Kconfig | ||
Makefile.bigbootblock.inc | ||
Makefile.bootblock.inc | ||
Makefile.inc |