coreboot-kgpe-d16/src/northbridge/intel/ironlake/Kconfig
Angel Pons a8df6cff16 nb/intel/ironlake: Use common {DMI,EP,MCH}BAR accessors
Tested with BUILD_TIMELESS=1, Packard Bell MS2290 remains identical.

Change-Id: I166dbebf0eaf9fe0454145d4d48a0622743916fd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-02-10 07:29:29 +00:00

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# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_IRONLAKE
bool
select CPU_INTEL_MODEL_2065X
select VGA
select INTEL_EDID
select INTEL_GMA_ACPI
select CACHE_MRC_SETTINGS
select HAVE_DEBUG_RAM_SETUP
if NORTHBRIDGE_INTEL_IRONLAKE
config VBOOT
select VBOOT_MUST_REQUEST_DISPLAY
select VBOOT_STARTS_IN_BOOTBLOCK
select VBOOT_SEPARATE_VERSTAGE
# CPU is reset without platform/TPM during romstage
select TPM_STARTUP_IGNORE_POSTINIT
config CBFS_SIZE
hex
default 0x100000
config VGA_BIOS_ID
string
default "8086,0046"
config DCACHE_RAM_BASE
hex
default 0xfefc0000
config DCACHE_RAM_SIZE
hex
default 0x10000
config DCACHE_BSP_STACK_SIZE
hex
default 0x2000
help
The amount of anticipated stack usage in CAR by bootblock and
other stages.
config MMCONF_BASE_ADDRESS
default 0xe0000000
config MMCONF_BUS_NUMBER
default 256
config INTEL_GMA_BCLV_OFFSET
default 0x48254
config FIXED_MCHBAR_MMIO_BASE
default 0xfed10000
config FIXED_DMIBAR_MMIO_BASE
default 0xfed18000
config FIXED_EPBAR_MMIO_BASE
default 0xfed19000
endif