aedbfc8f09
Write-protect SPI flash range provided by caller by using a free Flash Protected Range (FPR) register. This expects SoC to define a callback for providing information about the first FPR register address and maximum number of FPRs supported. BUG=chrome-os-partner:58896 Change-Id: I4e34ede8784e5587a5e08ffa10e20d2d14e20add Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17115 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
95 lines
3.1 KiB
Makefile
95 lines
3.1 KiB
Makefile
ifeq ($(CONFIG_SOC_INTEL_COMMON),y)
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bootblock-y += util.c
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verstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c
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verstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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bootblock-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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bootblock-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c
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romstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
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romstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c
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romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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romstage-y += util.c
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romstage-$(CONFIG_MMA) += mma.c
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postcar-y += util.c
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ramstage-y += hda_verb.c
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ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
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ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += nvm.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_SPI_PROTECT) += spi.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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ramstage-y += util.c
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ramstage-$(CONFIG_MMA) += mma.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c
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ramstage-y += vbt.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_GFX_OPREGION) += opregion.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI) += ./acpi/acpi.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_NHLT) += nhlt.c
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smm-$(CONFIG_SOC_INTEL_COMMON_SMI) += smihandler.c
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# Create and add the MRC cache to the cbfs image
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ifneq ($(CONFIG_CHROMEOS),y)
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$(obj)/mrc.cache: $(obj)/config.h
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dd if=/dev/zero count=1 \
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bs=$(shell printf "%d" $(CONFIG_MRC_SETTINGS_CACHE_SIZE) ) | \
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tr '\000' '\377' > $@
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cbfs-files-$(CONFIG_CACHE_MRC_SETTINGS) += mrc.cache
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mrc.cache-file := $(obj)/mrc.cache
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mrc.cache-position := $(CONFIG_MRC_SETTINGS_CACHE_BASE)
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mrc.cache-type := mrc_cache
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endif
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ifeq ($(CONFIG_MMA),y)
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MMA_BLOBS_PATH = $(call strip_quotes,$(CONFIG_MMA_BLOBS_PATH))
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MMA_TEST_NAMES = $(notdir $(wildcard $(MMA_BLOBS_PATH)/tests/*))
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MMA_TEST_CONFIG_NAMES = $(notdir $(wildcard $(MMA_BLOBS_PATH)/configs/*))
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#
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# MMA_CBFS_template is the template to be expanded by eval
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# where $(1) is file name
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# $(2) is file path
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# $(3) is file type, efi for test names (all .EFI files under $(MMA_BLOBS_PATH)/tests )
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# , mma for test param (all .BIN files under $(MMA_BLOBS_PATH)/configs/<test name>)
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#
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# $(MMA_BLOBS_PATH)/tests/<testX>.efi has coresponding test params
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# at $(MMA_BLOBS_PATH)/configs/<testX>/<XYZ>.bin
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#
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define MMA_CBFS_template =
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cbfs-files-y += $(1)
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$(1)-file := $(MMA_BLOBS_PATH)/$(2)/$(1)
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$(1)-type := $(3)
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endef
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#
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# following loop calls MMA_CBFS_template for each .EFI file under $(MMA_BLOBS_PATH)/tests with type = efi
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#
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$(foreach mma_test,$(MMA_TEST_NAMES),$(eval $(call MMA_CBFS_template,$(mma_test),tests,efi)))
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#
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# following nested loops calls MMA_CBFS_template for each .BIN file under each MMA_TEST_CONFIG_NAMES
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#
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# foreach <testX> do following
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# foreach <XYZ>.bin in <testX> do following
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# call MMA_CBFS_template for each <XYZ>.bin under current <testX> with type = mma
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#
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$(foreach mma_test, $(MMA_TEST_CONFIG_NAMES),\
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$(eval $(foreach mma_config,$(notdir $(wildcard $(MMA_BLOBS_PATH)/configs/$(mma_test)/*)),\
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$(eval $(call MMA_CBFS_template,$(mma_config),configs/$(mma_test),mma)))))
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endif
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cbfs-files-$(CONFIG_ADD_VBT_DATA_FILE) += vbt.bin
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vbt.bin-file := $(call strip_quotes,$(CONFIG_VBT_FILE))
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vbt.bin-type := raw
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endif
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