Sathyanarayana Nujella 50198c1178 mainboard/google/reef: update DMIC related pins configuration ... CLK_B1(GPIO_80) and DATA_2(GPIO_83) pins needs to be configured as native mode to use them for DMIC record on other potential DMIC's. DMIC blobs configure the clocks. For stereo & quad channel record, both CLK_A1 and CLK_B1 are enabled. For mono channel record, only CLK_A1 is enabled. BUG=chrome-os-partner:56918 BRANCH=None TEST=During DMIC record, check CLK_B1 and DATA_2 lines Change-Id: I838009b85190de5360d593238e48c9593c1dc43a Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Reviewed-on: https://review.coreboot.org/17199 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-11-07 20:15:13 +01:00
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include/baseboard	mainboard/google/reef: allow variants to override NHLT OEM strings	2016-10-28 19:02:35 +02:00
boardid.c
devicetree.cb	reef: tune trackpad i2c frequency to 400kHz	2016-11-04 23:19:21 +01:00
gpio.c	mainboard/google/reef: update DMIC related pins configuration	2016-11-07 20:15:13 +01:00
Makefile.inc	mainboard/google/reef: add baseboard nhlt configuration	2016-09-06 20:16:56 +02:00
memory.c	mainboard/google/reef: drop disabling periodic training for micron	2016-10-27 16:52:01 +02:00
nhlt.c	mainboard/google/reef: add baseboard nhlt configuration	2016-09-06 20:16:56 +02:00